diff mbox series

[RESEND,v2] gpio: omap: Add omap_gpio_disable/enable_irq calls

Message ID 20241031145652.342696-1-jm@ti.com
State New
Headers show
Series [RESEND,v2] gpio: omap: Add omap_gpio_disable/enable_irq calls | expand

Commit Message

Judith Mendez Oct. 31, 2024, 2:56 p.m. UTC 
From: Bin Liu <b-liu@ti.com>

Add omap_gpio_disable_irq and omap_gpio_enable_irq
calls in gpio-omap.

Currently, kernel cannot disable gpio interrupts in
case of a irq storm, so add omap_gpio_disable/enable_irq
so that interrupts can be disabled/enabled.

Signed-off-by: Bin Liu <b-liu@ti.com>
[Judith: Add commit message]
Signed-off-by: Judith Mendez <jm@ti.com>
---
Changes since v2:
- Fix email header and commit message
Changes since v1 RESEND:
- split patch from series [0]
- Add disable/enable calls without wrapper functions
[0] https://lore.kernel.org/linux-omap/20241011173356.870883-1-jm@ti.com/

Tested on am335x BeagleBone Black
---
 drivers/gpio/gpio-omap.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

Comments

Kevin Hilman Nov. 1, 2024, 2:29 p.m. UTC | #1 
Hi Judith,

Judith Mendez <jm@ti.com> writes:

> From: Bin Liu <b-liu@ti.com>
>
> Add omap_gpio_disable_irq and omap_gpio_enable_irq
> calls in gpio-omap.
>
> Currently, kernel cannot disable gpio interrupts in
> case of a irq storm, so add omap_gpio_disable/enable_irq
> so that interrupts can be disabled/enabled.
>
> Signed-off-by: Bin Liu <b-liu@ti.com>
> [Judith: Add commit message]
> Signed-off-by: Judith Mendez <jm@ti.com>

Thanks for this patch.  Can you give a bit more context on the
problem(s) this solves and on which SoCs/platforms it was
developed/validated?

Thanks,

Kevin
diff mbox series

Patch

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 76d5d87e9681e..137aabada26f9 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -711,6 +711,28 @@  static void omap_gpio_unmask_irq(struct irq_data *d)
 	raw_spin_unlock_irqrestore(&bank->lock, flags);
 }
 
+static void omap_gpio_disable_irq(struct irq_data *d)
+{
+	struct gpio_bank *bank = omap_irq_data_get_bank(d);
+	unsigned int offset = d->hwirq;
+	unsigned long flags;
+
+	raw_spin_lock_irqsave(&bank->lock, flags);
+	omap_set_gpio_irqenable(bank, offset, 0);
+	raw_spin_unlock_irqrestore(&bank->lock, flags);
+}
+
+static void omap_gpio_enable_irq(struct irq_data *d)
+{
+	struct gpio_bank *bank = omap_irq_data_get_bank(d);
+	unsigned int offset = d->hwirq;
+	unsigned long flags;
+
+	raw_spin_lock_irqsave(&bank->lock, flags);
+	omap_set_gpio_irqenable(bank, offset, 1);
+	raw_spin_unlock_irqrestore(&bank->lock, flags);
+}
+
 static void omap_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p)
 {
 	struct gpio_bank *bank = omap_irq_data_get_bank(d);
@@ -723,6 +745,8 @@  static const struct irq_chip omap_gpio_irq_chip = {
 	.irq_shutdown = omap_gpio_irq_shutdown,
 	.irq_mask = omap_gpio_mask_irq,
 	.irq_unmask = omap_gpio_unmask_irq,
+	.irq_disable = omap_gpio_disable_irq,
+	.irq_enable = omap_gpio_enable_irq,
 	.irq_set_type = omap_gpio_irq_type,
 	.irq_set_wake = omap_gpio_wake_enable,
 	.irq_bus_lock = omap_gpio_irq_bus_lock,
@@ -737,6 +761,8 @@  static const struct irq_chip omap_gpio_irq_chip_nowake = {
 	.irq_shutdown = omap_gpio_irq_shutdown,
 	.irq_mask = omap_gpio_mask_irq,
 	.irq_unmask = omap_gpio_unmask_irq,
+	.irq_disable = omap_gpio_disable_irq,
+	.irq_enable = omap_gpio_enable_irq,
 	.irq_set_type = omap_gpio_irq_type,
 	.irq_bus_lock = omap_gpio_irq_bus_lock,
 	.irq_bus_sync_unlock = gpio_irq_bus_sync_unlock,