Message ID | 20241113-add-display-support-for-qcs615-platform-v2-9-2873eb6fb869@quicinc.com |
---|---|
State | New |
Headers | show |
Series | Add display support for QCS615 platform | expand |
On 2024/11/13 20:21, Dmitry Baryshkov wrote: > On Wed, 13 Nov 2024 at 13:53, Fange Zhang <quic_fangez@quicinc.com> wrote: >> >> From: Li Liu <quic_lliu6@quicinc.com> >> >> For the QCS615 ride board, enable the SX150X to activate the ANX7625 >> allowing the DSI to output to the mDP through the external bridge. >> The ANX7625 relies on the SX150X chip to perform reset and HPD. >> >> Signed-off-by: Li Liu <quic_lliu6@quicinc.com> >> Signed-off-by: Fange Zhang <quic_fangez@quicinc.com> >> --- >> arch/arm64/configs/defconfig | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig >> index c0b8482ac6ad7498487718ba01d11b1c95e7543d..599a339a19435efbee7a5ef80c093b0e8c65f7ff 100644 >> --- a/arch/arm64/configs/defconfig >> +++ b/arch/arm64/configs/defconfig >> @@ -631,6 +631,7 @@ CONFIG_PINCTRL_SM8350=y >> CONFIG_PINCTRL_SM8450=y >> CONFIG_PINCTRL_SM8550=y >> CONFIG_PINCTRL_SM8650=y >> +CONFIG_PINCTRL_SX150X=y > > Your commit message doesn't describe why it needs to be disabled as a > built-in. You are trying to enable it for all defconfig users. > Also the placement of the symbol is not correct. You've added it to > the section with msm pinctrl drivers, while the chip has nothing to do > with msm. ok, will remove it from the patch series > >> CONFIG_PINCTRL_X1E80100=y >> CONFIG_PINCTRL_QCOM_SPMI_PMIC=y >> CONFIG_PINCTRL_LPASS_LPI=m >> >> -- >> 2.34.1 >> > >
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index c0b8482ac6ad7498487718ba01d11b1c95e7543d..599a339a19435efbee7a5ef80c093b0e8c65f7ff 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -631,6 +631,7 @@ CONFIG_PINCTRL_SM8350=y CONFIG_PINCTRL_SM8450=y CONFIG_PINCTRL_SM8550=y CONFIG_PINCTRL_SM8650=y +CONFIG_PINCTRL_SX150X=y CONFIG_PINCTRL_X1E80100=y CONFIG_PINCTRL_QCOM_SPMI_PMIC=y CONFIG_PINCTRL_LPASS_LPI=m