Message ID | 20241202131347.498124-28-peter.maydell@linaro.org |
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State | New |
Headers | show
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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385dea1e4ebsm10160157f8f.1.2024.12.02.05.14.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2024 05:14:33 -0800 (PST) From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>, Richard Henderson <richard.henderson@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Eduardo Habkost <eduardo@habkost.net>, Song Gao <gaosong@loongson.cn>, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Aleksandar Rikalo <arikalo@gmail.com>, Nicholas Piggin <npiggin@gmail.com>, Daniel Henrique Barboza <danielhb413@gmail.com>, David Hildenbrand <david@redhat.com>, Ilya Leoshkevich <iii@linux.ibm.com>, Thomas Huth <thuth@redhat.com>, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, Artyom Tarasenko <atar4qemu@gmail.com>, Max Filippov <jcmvbkbc@gmail.com> Subject: [PATCH v2 for-10.0 27/54] target/m68k: Don't pass NULL float_status to floatx80_default_nan() Date: Mon, 2 Dec 2024 13:13:20 +0000 Message-Id: <20241202131347.498124-28-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241202131347.498124-1-peter.maydell@linaro.org> References: <20241202131347.498124-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org |
Series |
fpu: Remove pickNaNMulAdd, default-NaN ifdefs
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expand
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On 12/2/24 07:13, Peter Maydell wrote: > Currently m68k_cpu_reset_hold() calls floatx80_default_nan(NULL) > to get the NaN bit pattern to reset the FPU registers. This > works because it happens that our implementation of > floatx80_default_nan() doesn't actually look at the float_status > pointer except for TARGET_MIPS. However, this isn't guaranteed, > and to be able to remove the ifdef in floatx80_default_nan() > we're going to need a real float_status here. > > Rearrange m68k_cpu_reset_hold() so that we initialize env->fp_status > earlier, and thus can pass it to floatx80_default_nan(). > > Signed-off-by: Peter Maydell<peter.maydell@linaro.org> > --- > target/m68k/cpu.c | 12 +++++++----- > 1 file changed, 7 insertions(+), 5 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 5fe335558aa..13b76e22488 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -76,7 +76,7 @@ static void m68k_cpu_reset_hold(Object *obj, ResetType type) CPUState *cs = CPU(obj); M68kCPUClass *mcc = M68K_CPU_GET_CLASS(obj); CPUM68KState *env = cpu_env(cs); - floatx80 nan = floatx80_default_nan(NULL); + floatx80 nan; int i; if (mcc->parent_phases.hold) { @@ -89,10 +89,6 @@ static void m68k_cpu_reset_hold(Object *obj, ResetType type) #else cpu_m68k_set_sr(env, SR_S | SR_I); #endif - for (i = 0; i < 8; i++) { - env->fregs[i].d = nan; - } - cpu_m68k_set_fpcr(env, 0); /* * M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL * 3.4 FLOATING-POINT INSTRUCTION DETAILS @@ -109,6 +105,12 @@ static void m68k_cpu_reset_hold(Object *obj, ResetType type) * preceding paragraph for nonsignaling NaNs. */ set_float_2nan_prop_rule(float_2nan_prop_ab, &env->fp_status); + + nan = floatx80_default_nan(&env->fp_status); + for (i = 0; i < 8; i++) { + env->fregs[i].d = nan; + } + cpu_m68k_set_fpcr(env, 0); env->fpsr = 0; /* TODO: We should set PC from the interrupt vector. */
Currently m68k_cpu_reset_hold() calls floatx80_default_nan(NULL) to get the NaN bit pattern to reset the FPU registers. This works because it happens that our implementation of floatx80_default_nan() doesn't actually look at the float_status pointer except for TARGET_MIPS. However, this isn't guaranteed, and to be able to remove the ifdef in floatx80_default_nan() we're going to need a real float_status here. Rearrange m68k_cpu_reset_hold() so that we initialize env->fp_status earlier, and thus can pass it to floatx80_default_nan(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/m68k/cpu.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-)