@@ -1287,7 +1287,7 @@ static const VMStateDescription vmstate_aspeed_smc = {
}
};
-static Property aspeed_smc_properties[] = {
+static const Property aspeed_smc_properties[] = {
DEFINE_PROP_BOOL("inject-failure", AspeedSMCState, inject_failure, false),
DEFINE_PROP_UINT64("dram-base", AspeedSMCState, dram_base, 0),
DEFINE_PROP_LINK("dram", AspeedSMCState, dram_mr,
@@ -1336,7 +1336,7 @@ static void aspeed_smc_flash_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
}
-static Property aspeed_smc_flash_properties[] = {
+static const Property aspeed_smc_flash_properties[] = {
DEFINE_PROP_UINT8("cs", AspeedSMCFlash, cs, 0),
DEFINE_PROP_LINK("controller", AspeedSMCFlash, controller, TYPE_ASPEED_SMC,
AspeedSMCState *),
@@ -561,7 +561,7 @@ static const MemoryRegionOps ibex_spi_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
-static Property ibex_spi_properties[] = {
+static const Property ibex_spi_properties[] = {
DEFINE_PROP_UINT32("num_cs", IbexSPIHostState, num_cs, 1),
DEFINE_PROP_END_OF_LIST(),
};
@@ -541,7 +541,7 @@ static const VMStateDescription vmstate_npcm7xx_fiu = {
},
};
-static Property npcm7xx_fiu_properties[] = {
+static const Property npcm7xx_fiu_properties[] = {
DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -1195,7 +1195,7 @@ static const MemoryRegionOps pnv_spi_xscom_ops = {
.endianness = DEVICE_BIG_ENDIAN,
};
-static Property pnv_spi_properties[] = {
+static const Property pnv_spi_properties[] = {
DEFINE_PROP_UINT32("spic_num", PnvSpi, spic_num, 0),
DEFINE_PROP_UINT8("transfer_len", PnvSpi, transfer_len, 4),
DEFINE_PROP_END_OF_LIST(),
@@ -328,7 +328,7 @@ static void sifive_spi_realize(DeviceState *dev, Error **errp)
fifo8_create(&s->rx_fifo, FIFO_CAPACITY);
}
-static Property sifive_spi_properties[] = {
+static const Property sifive_spi_properties[] = {
DEFINE_PROP_UINT32("num-cs", SiFiveSPIState, num_cs, 1),
DEFINE_PROP_END_OF_LIST(),
};
@@ -108,7 +108,7 @@ static void ssi_peripheral_realize(DeviceState *dev, Error **errp)
ssc->realize(s, errp);
}
-static Property ssi_peripheral_properties[] = {
+static const Property ssi_peripheral_properties[] = {
DEFINE_PROP_UINT8("cs", SSIPeripheral, cs_index, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -361,7 +361,7 @@ static const VMStateDescription vmstate_xilinx_spi = {
}
};
-static Property xilinx_spi_properties[] = {
+static const Property xilinx_spi_properties[] = {
DEFINE_PROP_UINT8("num-ss-bits", XilinxSPI, num_cs, 1),
DEFINE_PROP_END_OF_LIST(),
};
@@ -1420,12 +1420,12 @@ static const VMStateDescription vmstate_xlnx_zynqmp_qspips = {
}
};
-static Property xilinx_zynqmp_qspips_properties[] = {
+static const Property xilinx_zynqmp_qspips_properties[] = {
DEFINE_PROP_UINT32("dma-burst-size", XlnxZynqMPQSPIPS, dma_burst_size, 64),
DEFINE_PROP_END_OF_LIST(),
};
-static Property xilinx_spips_properties[] = {
+static const Property xilinx_spips_properties[] = {
DEFINE_PROP_UINT8("num-busses", XilinxSPIPS, num_busses, 1),
DEFINE_PROP_UINT8("num-ss-bits", XilinxSPIPS, num_cs, 4),
DEFINE_PROP_UINT8("num-txrx-bytes", XilinxSPIPS, num_txrx_bytes, 1),
@@ -1825,7 +1825,7 @@ static const VMStateDescription vmstate_xlnx_versal_ospi = {
}
};
-static Property xlnx_versal_ospi_properties[] = {
+static const Property xlnx_versal_ospi_properties[] = {
DEFINE_PROP_BOOL("dac-with-indac", XlnxVersalOspi, dac_with_indac, false),
DEFINE_PROP_BOOL("indac-write-disabled", XlnxVersalOspi,
ind_write_disabled, false),
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- hw/ssi/aspeed_smc.c | 4 ++-- hw/ssi/ibex_spi_host.c | 2 +- hw/ssi/npcm7xx_fiu.c | 2 +- hw/ssi/pnv_spi.c | 2 +- hw/ssi/sifive_spi.c | 2 +- hw/ssi/ssi.c | 2 +- hw/ssi/xilinx_spi.c | 2 +- hw/ssi/xilinx_spips.c | 4 ++-- hw/ssi/xlnx-versal-ospi.c | 2 +- 9 files changed, 11 insertions(+), 11 deletions(-)