@@ -123,7 +123,7 @@ static const VMStateDescription vmstate_a9_scu = {
}
};
-static Property a9_scu_properties[] = {
+static const Property a9_scu_properties[] = {
DEFINE_PROP_UINT32("num-cpu", A9SCUState, num_cpu, 1),
DEFINE_PROP_END_OF_LIST(),
};
@@ -314,7 +314,7 @@ static void allwinner_h3_dramc_init(Object *obj)
sysbus_init_mmio(sbd, &s->dramphy_iomem);
}
-static Property allwinner_h3_dramc_properties[] = {
+static const Property allwinner_h3_dramc_properties[] = {
DEFINE_PROP_UINT64("ram-addr", AwH3DramCtlState, ram_addr, 0x0),
DEFINE_PROP_UINT32("ram-size", AwH3DramCtlState, ram_size, 256 * MiB),
DEFINE_PROP_END_OF_LIST()
@@ -464,7 +464,7 @@ static void allwinner_r40_dramc_init(Object *obj)
sysbus_init_mmio(sbd, &s->dramphy_iomem);
}
-static Property allwinner_r40_dramc_properties[] = {
+static const Property allwinner_r40_dramc_properties[] = {
DEFINE_PROP_UINT64("ram-addr", AwR40DramCtlState, ram_addr, 0x0),
DEFINE_PROP_UINT32("ram-size", AwR40DramCtlState, ram_size, 256), /* MiB */
DEFINE_PROP_END_OF_LIST()
@@ -127,7 +127,7 @@ static void allwinner_sid_init(Object *obj)
sysbus_init_mmio(sbd, &s->iomem);
}
-static Property allwinner_sid_properties[] = {
+static const Property allwinner_sid_properties[] = {
DEFINE_PROP_UUID_NODEFAULT("identifier", AwSidState, identifier),
DEFINE_PROP_END_OF_LIST()
};
@@ -350,7 +350,7 @@ static void applesmc_unrealize(DeviceState *dev)
}
}
-static Property applesmc_isa_properties[] = {
+static const Property applesmc_isa_properties[] = {
DEFINE_PROP_UINT32(APPLESMC_PROP_IO_BASE, AppleSMCState, iobase,
APPLESMC_DEFAULT_IOBASE),
DEFINE_PROP_STRING("osk", AppleSMCState, osk),
@@ -75,7 +75,7 @@ static void arm11_scu_init(Object *obj)
sysbus_init_mmio(sbd, &s->iomem);
}
-static Property arm11_scu_properties[] = {
+static const Property arm11_scu_properties[] = {
DEFINE_PROP_UINT32("num-cpu", ARM11SCUState, num_cpu, 1),
DEFINE_PROP_END_OF_LIST()
};
@@ -173,7 +173,7 @@ static void l2x0_priv_init(Object *obj)
sysbus_init_mmio(dev, &s->iomem);
}
-static Property l2x0_properties[] = {
+static const Property l2x0_properties[] = {
DEFINE_PROP_UINT32("cache-type", L2x0State, cache_type, 0x1c100100),
DEFINE_PROP_END_OF_LIST(),
};
@@ -623,7 +623,7 @@ static void arm_sysctl_finalize(Object *obj)
g_free(s->db_clock_reset);
}
-static Property arm_sysctl_properties[] = {
+static const Property arm_sysctl_properties[] = {
DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0),
DEFINE_PROP_UINT32("proc_id", arm_sysctl_state, proc_id, 0),
/* Daughterboard power supply voltages (as reported via SYS_CFG) */
@@ -92,7 +92,7 @@ static const MemoryRegionOps armsse_cpuid_ops = {
.valid.max_access_size = 4,
};
-static Property armsse_cpuid_props[] = {
+static const Property armsse_cpuid_props[] = {
DEFINE_PROP_UINT32("CPUID", ARMSSECPUID, cpuid, 0),
DEFINE_PROP_END_OF_LIST()
};
@@ -436,7 +436,7 @@ static void aspeed_hace_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(sbd, &s->iomem);
}
-static Property aspeed_hace_properties[] = {
+static const Property aspeed_hace_properties[] = {
DEFINE_PROP_LINK("dram", AspeedHACEState, dram_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
DEFINE_PROP_END_OF_LIST(),
@@ -323,7 +323,7 @@ static void aspeed_i3c_realize(DeviceState *dev, Error **errp)
}
-static Property aspeed_i3c_device_properties[] = {
+static const Property aspeed_i3c_device_properties[] = {
DEFINE_PROP_UINT8("device-id", AspeedI3CDevice, id, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -454,7 +454,7 @@ static const VMStateDescription vmstate_aspeed_lpc = {
}
};
-static Property aspeed_lpc_properties[] = {
+static const Property aspeed_lpc_properties[] = {
DEFINE_PROP_UINT32("hicr7", AspeedLPCState, hicr7, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -136,7 +136,7 @@ static const VMStateDescription vmstate_aspeed_sbc = {
}
};
-static Property aspeed_sbc_properties[] = {
+static const Property aspeed_sbc_properties[] = {
DEFINE_PROP_BOOL("emmc-abr", AspeedSBCState, emmc_abr, 0),
DEFINE_PROP_UINT32("signing-settings", AspeedSBCState, signing_settings, 0),
DEFINE_PROP_END_OF_LIST(),
@@ -602,7 +602,7 @@ static const VMStateDescription vmstate_aspeed_scu = {
}
};
-static Property aspeed_scu_properties[] = {
+static const Property aspeed_scu_properties[] = {
DEFINE_PROP_UINT32("silicon-rev", AspeedSCUState, silicon_rev, 0),
DEFINE_PROP_UINT32("hw-strap1", AspeedSCUState, hw_strap1, 0),
DEFINE_PROP_UINT32("hw-strap2", AspeedSCUState, hw_strap2, 0),
@@ -294,7 +294,7 @@ static const VMStateDescription vmstate_aspeed_sdmc = {
}
};
-static Property aspeed_sdmc_properties[] = {
+static const Property aspeed_sdmc_properties[] = {
DEFINE_PROP_UINT64("max-ram-size", AspeedSDMCState, max_ram_size, 0),
DEFINE_PROP_BOOL("unlocked", AspeedSDMCState, unlocked, false),
DEFINE_PROP_END_OF_LIST(),
@@ -778,7 +778,7 @@ static const VMStateDescription cprman_vmstate = {
}
};
-static Property cprman_properties[] = {
+static const Property cprman_properties[] = {
DEFINE_PROP_UINT32("xosc-freq-hz", BCM2835CprmanState, xosc_freq, 19200000),
DEFINE_PROP_END_OF_LIST()
};
@@ -551,7 +551,7 @@ static void bcm2835_property_realize(DeviceState *dev, Error **errp)
bcm2835_property_reset(dev);
}
-static Property bcm2835_property_props[] = {
+static const Property bcm2835_property_props[] = {
DEFINE_PROP_UINT32("board-rev", BCM2835PropertyState, board_rev, 0),
DEFINE_PROP_STRING("command-line", BCM2835PropertyState, command_line),
DEFINE_PROP_END_OF_LIST()
@@ -56,7 +56,7 @@ static void debug_exit_realizefn(DeviceState *d, Error **errp)
isa->iobase, &isa->io);
}
-static Property debug_exit_properties[] = {
+static const Property debug_exit_properties[] = {
DEFINE_PROP_UINT32("iobase", ISADebugExitState, iobase, 0x501),
DEFINE_PROP_UINT32("iosize", ISADebugExitState, iosize, 0x02),
DEFINE_PROP_END_OF_LIST(),
@@ -325,7 +325,7 @@ static void ecc_realize(DeviceState *dev, Error **errp)
}
}
-static Property ecc_properties[] = {
+static const Property ecc_properties[] = {
DEFINE_PROP_UINT32("version", ECCState, version, -1),
DEFINE_PROP_END_OF_LIST(),
};
@@ -79,7 +79,7 @@ static void empty_slot_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem);
}
-static Property empty_slot_properties[] = {
+static const Property empty_slot_properties[] = {
DEFINE_PROP_UINT64("size", EmptySlot, size, 0),
DEFINE_PROP_STRING("name", EmptySlot, name),
DEFINE_PROP_END_OF_LIST(),
@@ -814,7 +814,7 @@ static const VMStateDescription iotkit_secctl_vmstate = {
},
};
-static Property iotkit_secctl_props[] = {
+static const Property iotkit_secctl_props[] = {
DEFINE_PROP_UINT32("sse-version", IoTKitSecCtl, sse_version, 0),
DEFINE_PROP_END_OF_LIST()
};
@@ -835,7 +835,7 @@ static const VMStateDescription iotkit_sysctl_vmstate = {
}
};
-static Property iotkit_sysctl_props[] = {
+static const Property iotkit_sysctl_props[] = {
DEFINE_PROP_UINT32("sse-version", IoTKitSysCtl, sse_version, 0),
DEFINE_PROP_UINT32("CPUWAIT_RST", IoTKitSysCtl, cpuwait_rst, 0),
DEFINE_PROP_UINT32("INITSVTOR0_RST", IoTKitSysCtl, initsvtor0_rst,
@@ -131,7 +131,7 @@ static const MemoryRegionOps iotkit_sysinfo_ops = {
.valid.max_access_size = 4,
};
-static Property iotkit_sysinfo_props[] = {
+static const Property iotkit_sysinfo_props[] = {
DEFINE_PROP_UINT32("SYS_VERSION", IoTKitSysInfo, sys_version, 0),
DEFINE_PROP_UINT32("SYS_CONFIG", IoTKitSysInfo, sys_config, 0),
DEFINE_PROP_UINT32("sse-version", IoTKitSysInfo, sse_version, 0),
@@ -1022,7 +1022,7 @@ static const VMStateDescription ivshmem_plain_vmsd = {
},
};
-static Property ivshmem_plain_properties[] = {
+static const Property ivshmem_plain_properties[] = {
DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF),
DEFINE_PROP_LINK("memdev", IVShmemState, hostmem, TYPE_MEMORY_BACKEND,
HostMemoryBackend *),
@@ -1077,7 +1077,7 @@ static const VMStateDescription ivshmem_doorbell_vmsd = {
},
};
-static Property ivshmem_doorbell_properties[] = {
+static const Property ivshmem_doorbell_properties[] = {
DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD,
@@ -101,7 +101,7 @@ static void led_realize(DeviceState *dev, Error **errp)
qdev_init_gpio_in(DEVICE(s), led_set_state_gpio_handler, 1);
}
-static Property led_properties[] = {
+static const Property led_properties[] = {
DEFINE_PROP_STRING("color", LEDState, color),
DEFINE_PROP_STRING("description", LEDState, description),
DEFINE_PROP_BOOL("gpio-active-high", LEDState, gpio_active_high, true),
@@ -1322,7 +1322,7 @@ static const VMStateDescription vmstate_q800_via1 = {
}
};
-static Property mos6522_q800_via1_properties[] = {
+static const Property mos6522_q800_via1_properties[] = {
DEFINE_PROP_DRIVE("drive", MOS6522Q800VIA1State, blk),
DEFINE_PROP_END_OF_LIST(),
};
@@ -554,7 +554,7 @@ static void cuda_init(Object *obj)
DEVICE(obj), "adb.0");
}
-static Property cuda_properties[] = {
+static const Property cuda_properties[] = {
DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0),
DEFINE_PROP_END_OF_LIST()
};
@@ -405,7 +405,7 @@ static const VMStateDescription vmstate_macio_newworld = {
}
};
-static Property macio_newworld_properties[] = {
+static const Property macio_newworld_properties[] = {
DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false),
DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false),
DEFINE_PROP_END_OF_LIST()
@@ -422,7 +422,7 @@ static void macio_newworld_class_init(ObjectClass *oc, void *data)
device_class_set_props(dc, macio_newworld_properties);
}
-static Property macio_properties[] = {
+static const Property macio_properties[] = {
DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
DEFINE_PROP_END_OF_LIST()
};
@@ -760,7 +760,7 @@ static void pmu_init(Object *obj)
sysbus_init_mmio(d, &s->mem);
}
-static Property pmu_properties[] = {
+static const Property pmu_properties[] = {
DEFINE_PROP_BOOL("has-adb", PMUState, has_adb, true),
DEFINE_PROP_END_OF_LIST()
};
@@ -211,7 +211,7 @@ static const VMStateDescription vmstate_mips_gcr = {
},
};
-static Property mips_gcr_properties[] = {
+static const Property mips_gcr_properties[] = {
DEFINE_PROP_UINT32("num-vp", MIPSGCRState, num_vps, 1),
DEFINE_PROP_INT32("gcr-rev", MIPSGCRState, gcr_rev, 0x800),
DEFINE_PROP_UINT64("gcr-base", MIPSGCRState, gcr_base, GCR_BASE_ADDR),
@@ -163,7 +163,7 @@ static const VMStateDescription vmstate_mips_cpc = {
},
};
-static Property mips_cpc_properties[] = {
+static const Property mips_cpc_properties[] = {
DEFINE_PROP_UINT32("num-vp", MIPSCPCState, num_vp, 0x1),
DEFINE_PROP_UINT64("vp-start-running", MIPSCPCState, vp_start_running, 0x1),
DEFINE_PROP_END_OF_LIST(),
@@ -533,7 +533,7 @@ static void mips_itu_reset(DeviceState *dev)
itc_reset_cells(s);
}
-static Property mips_itu_properties[] = {
+static const Property mips_itu_properties[] = {
DEFINE_PROP_UINT32("num-fifo", MIPSITUState, num_fifo,
ITC_FIFO_NUM_MAX),
DEFINE_PROP_UINT32("num-semaphores", MIPSITUState, num_semaphores,
@@ -696,7 +696,7 @@ static void mos6522_finalize(Object *obj)
timer_free(s->timers[1].timer);
}
-static Property mos6522_properties[] = {
+static const Property mos6522_properties[] = {
DEFINE_PROP_UINT64("frequency", MOS6522State, frequency, 0),
DEFINE_PROP_END_OF_LIST()
};
@@ -319,7 +319,7 @@ static const VMStateDescription mps2_fpgaio_vmstate = {
},
};
-static Property mps2_fpgaio_properties[] = {
+static const Property mps2_fpgaio_properties[] = {
/* Frequency of the prescale counter */
DEFINE_PROP_UINT32("prescale-clk", MPS2FPGAIO, prescale_clk, 20000000),
/* Number of LEDs controlled by LED0 register */
@@ -456,7 +456,7 @@ static const VMStateDescription mps2_scc_vmstate = {
}
};
-static Property mps2_scc_properties[] = {
+static const Property mps2_scc_properties[] = {
/* Values for various read-only ID registers (which are specific
* to the board model or FPGA image)
*/
@@ -118,7 +118,7 @@ static const VMStateDescription vmstate_msf2_sysreg = {
}
};
-static Property msf2_sysreg_properties[] = {
+static const Property msf2_sysreg_properties[] = {
/* default divisors in Libero GUI */
DEFINE_PROP_UINT8("apb0divisor", MSF2SysregState, apb0div, 2),
DEFINE_PROP_UINT8("apb1divisor", MSF2SysregState, apb1div, 2),
@@ -229,7 +229,7 @@ static const VMStateDescription vmstate_npcm7xx_gcr = {
},
};
-static Property npcm7xx_gcr_properties[] = {
+static const Property npcm7xx_gcr_properties[] = {
DEFINE_PROP_UINT32("disabled-modules", NPCM7xxGCRState, reset_mdlr, 0),
DEFINE_PROP_UINT32("power-on-straps", NPCM7xxGCRState, reset_pwron, 0),
DEFINE_PROP_END_OF_LIST(),
@@ -219,7 +219,7 @@ static void nrf51_rng_reset(DeviceState *dev)
}
-static Property nrf51_rng_properties[] = {
+static const Property nrf51_rng_properties[] = {
DEFINE_PROP_UINT16("period_unfiltered_us", NRF51RNGState,
period_unfiltered_us, 167),
DEFINE_PROP_UINT16("period_filtered_us", NRF51RNGState,
@@ -319,7 +319,7 @@ static void qdev_pci_testdev_reset(DeviceState *dev)
pci_testdev_reset(d);
}
-static Property pci_testdev_properties[] = {
+static const Property pci_testdev_properties[] = {
DEFINE_PROP_SIZE("membar", PCITestDevState, membar_size, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -98,7 +98,7 @@ static void build_pvpanic_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
aml_append(scope, dev);
}
-static Property pvpanic_isa_properties[] = {
+static const Property pvpanic_isa_properties[] = {
DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_UINT8("events", PVPanicISAState, pvpanic.events,
PVPANIC_EVENTS),
@@ -53,7 +53,7 @@ static void pvpanic_pci_realizefn(PCIDevice *dev, Error **errp)
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &ps->mr);
}
-static Property pvpanic_pci_properties[] = {
+static const Property pvpanic_pci_properties[] = {
DEFINE_PROP_UINT8("events", PVPanicPCIState, pvpanic.events,
PVPANIC_EVENTS),
DEFINE_PROP_END_OF_LIST(),
@@ -289,7 +289,7 @@ static void sifive_e_aon_init(Object *obj)
sysbus_init_irq(sbd, &r->wdog_irq);
}
-static Property sifive_e_aon_properties[] = {
+static const Property sifive_e_aon_properties[] = {
DEFINE_PROP_UINT64("wdogclk-frequency", SiFiveEAONState, wdogclk_freq,
SIFIVE_E_LFCLK_DEFAULT_FREQ),
DEFINE_PROP_END_OF_LIST(),
@@ -194,7 +194,7 @@ static const MemoryRegionOps sifive_u_otp_ops = {
}
};
-static Property sifive_u_otp_properties[] = {
+static const Property sifive_u_otp_properties[] = {
DEFINE_PROP_UINT32("serial", SiFiveUOTPState, serial, 0),
DEFINE_PROP_DRIVE("drive", SiFiveUOTPState, blk),
DEFINE_PROP_END_OF_LIST(),
@@ -1426,7 +1426,7 @@ static void stm32l4x5_rcc_realize(DeviceState *dev, Error **errp)
clock_update(s->gnd, 0);
}
-static Property stm32l4x5_rcc_properties[] = {
+static const Property stm32l4x5_rcc_properties[] = {
DEFINE_PROP_UINT64("hse_frequency", Stm32l4x5RccState,
hse_frequency, HSE_DEFAULT_FRQ),
DEFINE_PROP_UINT64("sai1_extclk_frequency", Stm32l4x5RccState,
@@ -587,7 +587,7 @@ static const VMStateDescription tz_mpc_vmstate = {
}
};
-static Property tz_mpc_properties[] = {
+static const Property tz_mpc_properties[] = {
DEFINE_PROP_LINK("downstream", TZMPC, downstream,
TYPE_MEMORY_REGION, MemoryRegion *),
DEFINE_PROP_END_OF_LIST(),
@@ -278,7 +278,7 @@ static const VMStateDescription tz_msc_vmstate = {
}
};
-static Property tz_msc_properties[] = {
+static const Property tz_msc_properties[] = {
DEFINE_PROP_LINK("downstream", TZMSC, downstream,
TYPE_MEMORY_REGION, MemoryRegion *),
DEFINE_PROP_LINK("idau", TZMSC, idau,
@@ -305,7 +305,7 @@ static const VMStateDescription tz_ppc_vmstate = {
DEFINE_PROP_LINK("port[" #N "]", TZPPC, port[N].downstream, \
TYPE_MEMORY_REGION, MemoryRegion *)
-static Property tz_ppc_properties[] = {
+static const Property tz_ppc_properties[] = {
DEFINE_PROP_UINT32("NONSEC_MASK", TZPPC, nonsec_mask, 0),
DEFINE_PORT(0),
DEFINE_PORT(1),
@@ -70,7 +70,7 @@ static void unimp_realize(DeviceState *dev, Error **errp)
sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->iomem);
}
-static Property unimp_properties[] = {
+static const Property unimp_properties[] = {
DEFINE_PROP_UINT64("size", UnimplementedDeviceState, size, 0),
DEFINE_PROP_STRING("name", UnimplementedDeviceState, name),
DEFINE_PROP_END_OF_LIST(),
@@ -720,7 +720,7 @@ static const VMStateDescription vmstate_cframe_reg = {
}
};
-static Property cframe_regs_props[] = {
+static const Property cframe_regs_props[] = {
DEFINE_PROP_LINK("cfu-fdro", XlnxVersalCFrameReg, cfg.cfu_fdro,
TYPE_XLNX_CFI_IF, XlnxCfiIf *),
DEFINE_PROP_UINT32("blktype0-frames", XlnxVersalCFrameReg,
@@ -771,7 +771,7 @@ static const VMStateDescription vmstate_cframe_bcast_reg = {
}
};
-static Property cframe_bcast_regs_props[] = {
+static const Property cframe_bcast_regs_props[] = {
DEFINE_PROP_LINK("cframe0", XlnxVersalCFrameBcastReg, cfg.cframe[0],
TYPE_XLNX_CFI_IF, XlnxCfiIf *),
DEFINE_PROP_LINK("cframe1", XlnxVersalCFrameBcastReg, cfg.cframe[1],
@@ -426,7 +426,7 @@ static void cfu_fdro_cfi_transfer_packet(XlnxCfiIf *cfi_if, XlnxCfiPacket *pkt)
}
}
-static Property cfu_props[] = {
+static const Property cfu_props[] = {
DEFINE_PROP_LINK("cframe0", XlnxVersalCFUAPB, cfg.cframe[0],
TYPE_XLNX_CFI_IF, XlnxCfiIf *),
DEFINE_PROP_LINK("cframe1", XlnxVersalCFUAPB, cfg.cframe[1],
@@ -460,7 +460,7 @@ static Property cfu_props[] = {
DEFINE_PROP_END_OF_LIST(),
};
-static Property cfu_sfr_props[] = {
+static const Property cfu_sfr_props[] = {
DEFINE_PROP_LINK("cfu", XlnxVersalCFUSFR, cfg.cfu,
TYPE_XLNX_VERSAL_CFU_APB, XlnxVersalCFUAPB *),
DEFINE_PROP_END_OF_LIST(),
@@ -218,7 +218,7 @@ static const VMStateDescription vmstate_xram_ctrl = {
}
};
-static Property xram_ctrl_properties[] = {
+static const Property xram_ctrl_properties[] = {
DEFINE_PROP_UINT64("size", XlnxXramCtrl, cfg.size, 1 * MiB),
DEFINE_PROP_END_OF_LIST(),
};
@@ -623,7 +623,7 @@ static const VMStateDescription vmstate_zynq_slcr = {
}
};
-static Property zynq_slcr_props[] = {
+static const Property zynq_slcr_props[] = {
DEFINE_PROP_UINT8("boot-mode", ZynqSLCRState, boot_mode, 1),
DEFINE_PROP_END_OF_LIST(),
};
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- hw/misc/a9scu.c | 2 +- hw/misc/allwinner-h3-dramc.c | 2 +- hw/misc/allwinner-r40-dramc.c | 2 +- hw/misc/allwinner-sid.c | 2 +- hw/misc/applesmc.c | 2 +- hw/misc/arm11scu.c | 2 +- hw/misc/arm_l2x0.c | 2 +- hw/misc/arm_sysctl.c | 2 +- hw/misc/armsse-cpuid.c | 2 +- hw/misc/aspeed_hace.c | 2 +- hw/misc/aspeed_i3c.c | 2 +- hw/misc/aspeed_lpc.c | 2 +- hw/misc/aspeed_sbc.c | 2 +- hw/misc/aspeed_scu.c | 2 +- hw/misc/aspeed_sdmc.c | 2 +- hw/misc/bcm2835_cprman.c | 2 +- hw/misc/bcm2835_property.c | 2 +- hw/misc/debugexit.c | 2 +- hw/misc/eccmemctl.c | 2 +- hw/misc/empty_slot.c | 2 +- hw/misc/iotkit-secctl.c | 2 +- hw/misc/iotkit-sysctl.c | 2 +- hw/misc/iotkit-sysinfo.c | 2 +- hw/misc/ivshmem.c | 4 ++-- hw/misc/led.c | 2 +- hw/misc/mac_via.c | 2 +- hw/misc/macio/cuda.c | 2 +- hw/misc/macio/macio.c | 4 ++-- hw/misc/macio/pmu.c | 2 +- hw/misc/mips_cmgcr.c | 2 +- hw/misc/mips_cpc.c | 2 +- hw/misc/mips_itu.c | 2 +- hw/misc/mos6522.c | 2 +- hw/misc/mps2-fpgaio.c | 2 +- hw/misc/mps2-scc.c | 2 +- hw/misc/msf2-sysreg.c | 2 +- hw/misc/npcm7xx_gcr.c | 2 +- hw/misc/nrf51_rng.c | 2 +- hw/misc/pci-testdev.c | 2 +- hw/misc/pvpanic-isa.c | 2 +- hw/misc/pvpanic-pci.c | 2 +- hw/misc/sifive_e_aon.c | 2 +- hw/misc/sifive_u_otp.c | 2 +- hw/misc/stm32l4x5_rcc.c | 2 +- hw/misc/tz-mpc.c | 2 +- hw/misc/tz-msc.c | 2 +- hw/misc/tz-ppc.c | 2 +- hw/misc/unimp.c | 2 +- hw/misc/xlnx-versal-cframe-reg.c | 4 ++-- hw/misc/xlnx-versal-cfu.c | 4 ++-- hw/misc/xlnx-versal-xramc.c | 2 +- hw/misc/zynq_slcr.c | 2 +- 52 files changed, 56 insertions(+), 56 deletions(-)