Message ID | 20241217064856.2772305-7-quic_wasimn@quicinc.com |
---|---|
State | New |
Headers | show |
Series | [v4,1/7] dt-bindings: arm: qcom,ids: add SoC ID for QCS9075 | expand |
On 20/12/2024 12:38, Manaf Meethalavalappu Pallikunhi wrote: > > Hi Krzysztof, > > Thank you for reviewing this patch. > > On 12/18/2024 1:32 PM, Krzysztof Kozlowski wrote: >> On 17/12/2024 07:48, Wasim Nazir wrote: >>> From: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com> >>> >>> Enable cpu idle injection framework and thermal cpu idle cooling device >>> to throttle the cpu by injecting idle cycle during high thermal condition. >> I know what they do, but why do we need it in the defconfig? This is not >> a product defconfig, just in case you mirrored downstream patches. > > We believe these defconfigs serve as a generic framework rather than No... > being tied to specific product features. Therefore, we have enabled them They are tied to specific products. > in the defconfig to ensure the end-to-end feature is available in the > pristine upstream build. However, if you think this would introduce Why would we care about this end-to-end feature? > overhead for other products, we will exclude this patch in the next > revision. I just did not see here any explanation why this should be added. I don't need to come with extensive disagreement, because by default we do not enable everything. We enable only some things because of some reason. And that's why you have commit msg... Best regards, Krzysztof
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 76bd7424985a..32911e57e761 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -693,6 +693,7 @@ CONFIG_SENSORS_INA2XX=m CONFIG_SENSORS_INA3221=m CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y CONFIG_CPU_THERMAL=y +CONFIG_CPU_IDLE_THERMAL=y CONFIG_DEVFREQ_THERMAL=y CONFIG_THERMAL_EMULATION=y CONFIG_IMX_SC_THERMAL=m @@ -1595,6 +1596,8 @@ CONFIG_HISI_PMU=y CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU=m CONFIG_NVIDIA_CORESIGHT_PMU_ARCH_SYSTEM_PMU=m CONFIG_MESON_DDR_PMU=m +CONFIG_POWERCAP=y +CONFIG_IDLE_INJECT=y CONFIG_NVMEM_LAYOUT_SL28_VPD=m CONFIG_NVMEM_IMX_OCOTP=y CONFIG_NVMEM_IMX_OCOTP_ELE=m