Message ID | 20241216-concurrent-wb-v4-17-fe220297a7f0@quicinc.com |
---|---|
State | New |
Headers | show |
Series | drm/msm/dpu: Add Concurrent Writeback Support for DPU 10.x+ | expand |
On Mon, Dec 16, 2024 at 04:43:28PM -0800, Jessica Zhang wrote: > We cannot support both CWB and CDM simultaneously as this would require > 2 CDM blocks and currently our hardware only supports 1 CDM block at > most. Why would CWB require a second CDM block? I think that YUV output over DP (needs_cdm = true) and RGB output over WB (cwb_enabled = true) should work. Am I wrong? > > Thus return an error if both CWB and CDM are enabled. > > Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > index 9bb920d28bae2706b3892c167fe2bec3fd8857f4..a6372eee916e8aba702bbefc3615d8882ddcaad9 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > @@ -1261,6 +1261,10 @@ static int dpu_crtc_assign_resources(struct drm_crtc *crtc, struct drm_crtc_stat > return 0; > > topology = dpu_crtc_get_topology(crtc, dpu_kms, crtc_state); > + > + if (topology.cwb_enabled && topology.needs_cdm) > + return -EINVAL; > + > ret = dpu_rm_reserve(&dpu_kms->rm, global_state, > crtc, &topology); > if (ret) > > -- > 2.34.1 >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 9bb920d28bae2706b3892c167fe2bec3fd8857f4..a6372eee916e8aba702bbefc3615d8882ddcaad9 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -1261,6 +1261,10 @@ static int dpu_crtc_assign_resources(struct drm_crtc *crtc, struct drm_crtc_stat return 0; topology = dpu_crtc_get_topology(crtc, dpu_kms, crtc_state); + + if (topology.cwb_enabled && topology.needs_cdm) + return -EINVAL; + ret = dpu_rm_reserve(&dpu_kms->rm, global_state, crtc, &topology); if (ret)
We cannot support both CWB and CDM simultaneously as this would require 2 CDM blocks and currently our hardware only supports 1 CDM block at most. Thus return an error if both CWB and CDM are enabled. Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 4 ++++ 1 file changed, 4 insertions(+)