@@ -267,16 +267,15 @@ bool translator_st(const DisasContextBase *db, void *dest,
*/
size_t translator_st_len(const DisasContextBase *db);
-#ifdef COMPILING_PER_TARGET
-/*
- * Return whether addr is on the same page as where disassembly started.
+/**
+ * translator_is_same_page
+ * @db: disassembly context
+ * @addr: virtual address within TB
+ *
+ * Return whether @addr is on the same page as where disassembly started.
* Translators can use this to enforce the rule that only single-insn
* translation blocks are allowed to cross page boundaries.
*/
-static inline bool is_same_page(const DisasContextBase *db, vaddr addr)
-{
- return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) == 0;
-}
-#endif
+bool translator_is_same_page(const DisasContextBase *db, vaddr addr);
#endif /* EXEC__TRANSLATOR_H */
@@ -104,6 +104,11 @@ static void gen_tb_end(const TranslationBlock *tb, uint32_t cflags,
}
}
+bool translator_is_same_page(const DisasContextBase *db, vaddr addr)
+{
+ return ((addr ^ db->pc_first) & TARGET_PAGE_MASK) == 0;
+}
+
bool translator_use_goto_tb(DisasContextBase *db, vaddr dest)
{
/* Suppress goto_tb if requested. */
@@ -112,7 +117,7 @@ bool translator_use_goto_tb(DisasContextBase *db, vaddr dest)
}
/* Check for the dest on the same page as the start of the TB. */
- return ((db->pc_first ^ dest) & TARGET_PAGE_MASK) == 0;
+ return translator_is_same_page(db, dest);
}
void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns,
@@ -1512,7 +1512,7 @@ static uint64_t advance_pc(CPUX86State *env, DisasContext *s, int num_bytes)
/* This is a subsequent insn that crosses a page boundary. */
if (s->base.num_insns > 1 &&
- !is_same_page(&s->base, s->pc + num_bytes - 1)) {
+ !translator_is_same_page(&s->base, s->pc + num_bytes - 1)) {
siglongjmp(s->jmpbuf, 2);
}
@@ -2226,7 +2226,7 @@ static void gen_jmp_rel(DisasContext *s, MemOp ot, int diff, int tb_num)
* no extra masking to apply (data16 branch in code32, see above),
* then we have also proven that the addition does not wrap.
*/
- if (!use_goto_tb || !is_same_page(&s->base, new_pc)) {
+ if (!use_goto_tb || !translator_is_same_page(&s->base, new_pc)) {
tcg_gen_andi_tl(cpu_eip, cpu_eip, mask);
use_goto_tb = false;
}
@@ -3763,7 +3763,7 @@ static void i386_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
* chance to happen.
*/
dc->base.is_jmp = DISAS_EOB_NEXT;
- } else if (!is_same_page(&dc->base, dc->base.pc_next)) {
+ } else if (!translator_is_same_page(&dc->base, dc->base.pc_next)) {
dc->base.is_jmp = DISAS_TOO_MANY;
}
}
@@ -1305,7 +1305,7 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
/* Only the first insn within a TB is allowed to cross a page boundary. */
if (ctx->base.is_jmp == DISAS_NEXT) {
- if (ctx->itrigger || !is_same_page(&ctx->base, ctx->base.pc_next)) {
+ if (ctx->itrigger || !translator_is_same_page(&ctx->base, ctx->base.pc_next)) {
ctx->base.is_jmp = DISAS_TOO_MANY;
} else {
unsigned page_ofs = ctx->base.pc_next & ~TARGET_PAGE_MASK;
@@ -1315,7 +1315,7 @@ static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
translator_lduw(env, &ctx->base, ctx->base.pc_next);
int len = insn_len(next_insn);
- if (!is_same_page(&ctx->base, ctx->base.pc_next + len - 1)) {
+ if (!translator_is_same_page(&ctx->base, ctx->base.pc_next + len - 1)) {
ctx->base.is_jmp = DISAS_TOO_MANY;
}
}
@@ -6423,8 +6423,8 @@ static void s390x_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
dc->base.is_jmp = translate_one(env, dc);
if (dc->base.is_jmp == DISAS_NEXT) {
if (dc->ex_value ||
- !is_same_page(dcbase, dc->base.pc_next) ||
- !is_same_page(dcbase, get_next_pc(env, dc, dc->base.pc_next))) {
+ !translator_is_same_page(dcbase, dc->base.pc_next) ||
+ !translator_is_same_page(dcbase, get_next_pc(env, dc, dc->base.pc_next))) {
dc->base.is_jmp = DISAS_TOO_MANY;
}
}