diff mbox series

[RFC,05/15] hwmon: Fix Intel family checks to include extended family numbers

Message ID 20241220213711.1892696-6-sohil.mehta@intel.com
State New
Headers show
Series Prepare for new Intel family models | expand

Commit Message

Sohil Mehta Dec. 20, 2024, 9:37 p.m. UTC
The current Intel family-model checks in the coretemp driver seem to
implicitly assume family 6. Extend the checks to include the extended
family numbers beyond 15 as well.

Also, add explicit checks for family 6 in places where it is assumed
implicitly.

x86_model checks seem inconsistent and scattered throughout the driver.
Consolidating and converting them to VFM ones would be a useful addition
in future.

Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
---
 drivers/hwmon/coretemp.c | 26 ++++++++++++++++++--------
 1 file changed, 18 insertions(+), 8 deletions(-)

Comments

Guenter Roeck Dec. 21, 2024, 5:27 p.m. UTC | #1
On 12/20/24 13:37, Sohil Mehta wrote:
> The current Intel family-model checks in the coretemp driver seem to
> implicitly assume family 6. Extend the checks to include the extended
> family numbers beyond 15 as well.
> 
> Also, add explicit checks for family 6 in places where it is assumed
> implicitly.
> 
> x86_model checks seem inconsistent and scattered throughout the driver.
> Consolidating and converting them to VFM ones would be a useful addition
> in future.
> 

That seems to be irrelevant for the patch description.

> Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>

Acked-by: Guenter Roeck <linux@roeck-us.net>

The patch is independent, but since it is submitted as part of a series
and there is no comment suggesting otherwise, I assume that it is expected
to be pushed together with that series, and I won't take it into the hwmon
branch.

Guenter
Sohil Mehta Dec. 23, 2024, 6:13 p.m. UTC | #2
On 12/21/2024 9:27 AM, Guenter Roeck wrote:


>> Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
> 
> Acked-by: Guenter Roeck <linux@roeck-us.net>
> 

Thank you for the Ack.

> The patch is independent, but since it is submitted as part of a series
> and there is no comment suggesting otherwise, I assume that it is expected
> to be pushed together with that series, and I won't take it into the hwmon
> branch.
> 

This first RFC version was mainly intended to be a conversation starter.
I am not very familiar with hwmon and my testing has been fairly
limited. I was hoping we can get at least one tested-by on this patch
before merging it.

I have tried to keep all the patches independent to make it easier to
merge whenever they seem ready. Please feel free to merge the patch if
it seems so.

Sohil
diff mbox series

Patch

diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 1b9203b20d70..1aa67a2b5f18 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -185,6 +185,13 @@  static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
 			return tjmax_table[i].tjmax;
 	}
 
+	/*
+	 * Return without adjustment if the Family isn't 6.
+	 * The rest of the function assumes Family 6.
+	 */
+	if (c->x86 != 6)
+		return tjmax;
+
 	for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
 		const struct tjmax_model *tm = &tjmax_model_table[i];
 		if (c->x86_model == tm->model &&
@@ -260,14 +267,17 @@  static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
 
 static bool cpu_has_tjmax(struct cpuinfo_x86 *c)
 {
+	u8 family = c->x86;
 	u8 model = c->x86_model;
 
-	return model > 0xe &&
-	       model != 0x1c &&
-	       model != 0x26 &&
-	       model != 0x27 &&
-	       model != 0x35 &&
-	       model != 0x36;
+	return family > 15 ||
+	       (family == 6 &&
+		model > 0xe &&
+		model != 0x1c &&
+		model != 0x26 &&
+		model != 0x27 &&
+		model != 0x35 &&
+		model != 0x36);
 }
 
 static int get_tjmax(struct temp_data *tdata, struct device *dev)
@@ -460,7 +470,7 @@  static int chk_ucode_version(unsigned int cpu)
 	 * Readings might stop update when processor visited too deep sleep,
 	 * fixed for stepping D0 (6EC).
 	 */
-	if (c->x86_model == 0xe && c->x86_stepping < 0xc && c->microcode < 0x39) {
+	if (c->x86 == 6 && c->x86_model == 0xe && c->x86_stepping < 0xc && c->microcode < 0x39) {
 		pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
 		return -ENODEV;
 	}
@@ -580,7 +590,7 @@  static int create_core_data(struct platform_device *pdev, unsigned int cpu,
 	 * MSR_IA32_TEMPERATURE_TARGET register. Atoms don't have the register
 	 * at all.
 	 */
-	if (c->x86_model > 0xe && c->x86_model != 0x1c)
+	if (c->x86 > 15 || (c->x86 == 6 && c->x86_model > 0xe && c->x86_model != 0x1c))
 		if (get_ttarget(tdata, &pdev->dev) >= 0)
 			tdata->attr_size++;