diff mbox series

[v2,11/81] target/i386: Remove TCG_TARGET_extract_tl_valid

Message ID	20250107080112.1175095-12-richard.henderson@linaro.org
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Cc: philmd@linaro.org, pierrick.bouvier@linaro.org Subject: [PATCH v2 11/81] target/i386: Remove TCG_TARGET_extract_tl_valid Date: Tue, 7 Jan 2025 00:00:02 -0800 Message-ID: <20250107080112.1175095-12-richard.henderson@linaro.org> In-Reply-To: <20250107080112.1175095-1-richard.henderson@linaro.org> References: <20250107080112.1175095-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org
Series	tcg: Merge _i32 and _i64 opcodes \| expand [RFC,v2,00/81] tcg: Merge _i32 and _i64 opcodes [v2,01/81] tcg: Move call abi parameters from tcg-target.h to tcg-target.c.inc [v2,02/81] tcg: Replace TCGOP_VECL with TCGOP_TYPE [v2,03/81] tcg: Move tcg_op_insert_{after, before} decls to tcg-internal.h [v2,04/81] tcg: Copy TCGOP_TYPE in tcg_op_insert_{after, before} [v2,05/81] tcg: Add TCGOP_FLAGS [v2,06/81] tcg: Add type and flags arguments to tcg_op_supported [v2,07/81] target/arm: Do not test TCG_TARGET_HAS_bitsel_vec [v2,08/81] target/arm: Use tcg_op_supported [v2,09/81] target/tricore: Use tcg_op_supported [v2,10/81] tcg: Add tcg_op_deposit_valid [v2,11/81] target/i386: Remove TCG_TARGET_extract_tl_valid [v2,12/81] target/i386: Use tcg_op_deposit_valid [v2,13/81] target/i386: Use tcg_op_supported [v2,14/81] tcg: Remove TCG_TARGET_NEED_LDST_LABELS and TCG_TARGET_NEED_POOL_LABELS [v2,15/81] tcg: Rename tcg-target.opc.h to tcg-target-opc.h.inc [v2,16/81] tcg/tci: Move TCI specific opcodes to tcg-target-opc.h.inc [v2,17/81] tcg: Move fallback tcg_can_emit_vec_op out of line [v2,18/81] tcg: Split out tcg-target-has.h and tcg-has.h [v2,19/81] tcg: Split out tcg-target-mo.h [v2,20/81] tcg: Use C_NotImplemented in tcg_target_op_def [v2,21/81] tcg: Change have_vec to has_type in tcg_op_supported [v2,22/81] tcg: Reorg process_op_defs [v2,23/81] tcg: Remove args_ct from TCGOpDef [v2,24/81] tcg: Constify tcg_op_defs [v2,25/81] tcg: Validate op supported in opcode_args_ct [v2,26/81] tcg: Add TCG_OPF_NOT_PRESENT to opcodes without inputs or outputs [v2,27/81] tcg: Pass type and flags to tcg_target_op_def [v2,28/81] tcg: Add TCGType argument to tcg_out_op [v2,29/81] tcg: Remove TCG_OPF_64BIT [v2,30/81] tcg: Drop implementation checks from tcg-opc.h [v2,31/81] tcg: Replace IMPLVEC with TCG_OPF_VECTOR [v2,32/81] tcg/mips: Expand bswap unconditionally [v2,33/81] tcg/i386: Handle all 8-bit extensions for i686 [v2,34/81] tcg/i386: Fold the ext{8, 16, 32}[us] cases into {s}extract [v2,35/81] tcg/aarch64: Provide TCG_TARGET_{s}extract_valid [v2,36/81] tcg/aarch64: Expand extract with offset 0 with andi [v2,37/81] tcg/arm: Add full [US]XT[BH] into {s}extract [v2,38/81] tcg/loongarch64: Fold the ext{8, 16, 32}[us] cases into {s}extract [v2,39/81] tcg/mips: Fold the ext{8, 16, 32}[us] cases into {s}extract [v2,40/81] tcg/ppc: Fold the ext{8, 16, 32}[us] cases into {s}extract [v2,41/81] tcg/riscv64: Fold the ext{8, 16, 32}[us] cases into {s}extract [v2,42/81] tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64 [v2,43/81] tcg/s390x: Fold the ext{8, 16, 32}[us] cases into {s}extract [v2,44/81] tcg/sparc64: Use SRA, SRL for {s}extract_i64 [v2,45/81] tcg/tci: Provide TCG_TARGET_{s}extract_valid [v2,46/81] tcg/tci: Remove assertions for deposit and extract [v2,47/81] tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64} [v2,48/81] tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64} [v2,49/81] tcg: Remove INDEX_op_ext{8,16,32}* [v2,50/81] tcg: Add all_outop[] [v2,51/81] tcg: Merge INDEX_op_mov_{i32,i64} [v2,52/81] tcg: Convert add to TCGOutOpBinary [v2,53/81] tcg: Merge INDEX_op_add_{i32,i64} [v2,54/81] tcg: Convert and to TCGOutOpBinary [v2,55/81] tcg: Merge INDEX_op_and_{i32,i64} [v2,56/81] tcg/optimize: Fold andc with immediate to and [v2,57/81] tcg/optimize: Emit add r, r, -1 in fold_setcond_tst_pow2 [v2,58/81] tcg: Convert andc to TCGOutOpBinary [v2,59/81] tcg: Merge INDEX_op_andc_{i32,i64} [v2,60/81] tcg: Convert or to TCGOutOpBinary [v2,61/81] tcg: Merge INDEX_op_or_{i32,i64} [v2,62/81] tcg/optimize: Fold orc with immediate to or [v2,63/81] tcg: Convert orc to TCGOutOpBinary [v2,64/81] tcg: Merge INDEX_op_orc_{i32,i64} [v2,65/81] tcg: Convert xor to TCGOutOpBinary [v2,66/81] tcg: Merge INDEX_op_xor_{i32,i64} [v2,67/81] tcg/optimize: Fold eqv with immediate to xor [v2,68/81] tcg: Convert eqv to TCGOutOpBinary [v2,69/81] tcg: Merge INDEX_op_eqv_{i32,i64} [v2,70/81] tcg: Convert nand to TCGOutOpBinary [v2,71/81] tcg: Merge INDEX_op_nand_{i32,i64} [v2,72/81] tcg/loongarch64: Do not accept constant argument to nor [v2,73/81] tcg: Convert nor to TCGOutOpBinary [v2,74/81] tcg: Merge INDEX_op_nor_{i32,i64} [v2,75/81] tcg/arm: Fix constraints for sub [v2,76/81] tcg: Convert sub to TCGOutOpSubtract [v2,77/81] tcg: Merge INDEX_op_sub_{i32,i64} [v2,78/81] tcg: Convert neg to TCGOutOpUnary [v2,79/81] tcg: Merge INDEX_op_neg_{i32,i64} [v2,80/81] tcg: Convert not to TCGOutOpUnary [v2,81/81] tcg: Merge INDEX_op_not_{i32,i64}

Commit Message

Richard Henderson Jan. 7, 2025, 8 a.m. UTC

This macro is unused.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/i386/tcg/emit.c.inc | 2 --
 1 file changed, 2 deletions(-)

diff mbox series

Patch

diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index 785ff63f2a..ab416627b7 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -26,11 +26,9 @@ 
 #ifdef TARGET_X86_64
 #define TCG_TARGET_HAS_extract2_tl      TCG_TARGET_HAS_extract2_i64
 #define TCG_TARGET_deposit_tl_valid     TCG_TARGET_deposit_i64_valid
-#define TCG_TARGET_extract_tl_valid     TCG_TARGET_extract_i64_valid
 #else
 #define TCG_TARGET_HAS_extract2_tl      TCG_TARGET_HAS_extract2_i32
 #define TCG_TARGET_deposit_tl_valid     TCG_TARGET_deposit_i32_valid
-#define TCG_TARGET_extract_tl_valid     TCG_TARGET_extract_i32_valid
 #endif
 
 #define MMX_OFFSET(reg)                        \