| Message ID | 20250227123628.2931490-2-hchauhan@ventanamicro.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add RAS support for RISC-V architecture | expand |
On Thu, Feb 27, 2025 at 6:08 PM Himanshu Chauhan <hchauhan@ventanamicro.com> wrote: > > bert and einj drivers use ioremap_cache for mapping entries > but ioremap_cache is not defined for RISC-V. > > Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> > --- > arch/riscv/include/asm/io.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h > index 1c5c641075d2..e23a4901e928 100644 > --- a/arch/riscv/include/asm/io.h > +++ b/arch/riscv/include/asm/io.h > @@ -30,6 +30,9 @@ > #define PCI_IOBASE ((void __iomem *)PCI_IO_START) > #endif /* CONFIG_MMU */ > > +#define ioremap_cache(addr, size) \ > + ((__force void *)ioremap_prot((addr), (size), _PAGE_KERNEL)) > + There is a compile error observed with this patch applied on the latest Linux-6.15-rcX kernel. To fix compile error, we need the following change: s/_PAGE_KERNEL/PAGE_KERNEL/ Regards, Anup
diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index 1c5c641075d2..e23a4901e928 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -30,6 +30,9 @@ #define PCI_IOBASE ((void __iomem *)PCI_IO_START) #endif /* CONFIG_MMU */ +#define ioremap_cache(addr, size) \ + ((__force void *)ioremap_prot((addr), (size), _PAGE_KERNEL)) + /* * Emulation routines for the port-mapped IO space used by some PCI drivers. * These are defined as being "fully synchronous", but also "not guaranteed to
bert and einj drivers use ioremap_cache for mapping entries but ioremap_cache is not defined for RISC-V. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> --- arch/riscv/include/asm/io.h | 3 +++ 1 file changed, 3 insertions(+)