| Message ID | 20250309-ecam_v4-v5-5-8eff4b59790d@oss.qualcomm.com |
|---|---|
| State | New |
| Headers | show |
| Series | PCI: dwc: Add ECAM support with iATU configuration | expand |
On Sun, Mar 09, 2025 at 11:15:27AM +0530, Krishna Chaitanya Chundru wrote: > Instead of using qcom ELBI resources mapping use dwc mapping as this s/use dwc mapping/let the DWC core map it > ELBI is dwc specific. > s/dwc/DWC > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> One comment below. > --- > drivers/pci/controller/dwc/pcie-qcom.c | 12 +++--------- > 1 file changed, 3 insertions(+), 9 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index e4d3366ead1f..258b2d615080 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -265,7 +265,6 @@ struct qcom_pcie_cfg { > struct qcom_pcie { > struct dw_pcie *pci; > void __iomem *parf; /* DT parf */ > - void __iomem *elbi; /* DT elbi */ > void __iomem *mhi; > union qcom_pcie_resources res; > struct phy *phy; > @@ -390,12 +389,13 @@ static void qcom_pcie_configure_dbi_atu_base(struct qcom_pcie *pcie) > > static void qcom_pcie_2_1_0_ltssm_enable(struct qcom_pcie *pcie) > { > + struct dw_pcie *pci = pcie->pci; > u32 val; > > /* enable link training */ > - val = readl(pcie->elbi + ELBI_SYS_CTRL); > + val = readl(pci->elbi_base + ELBI_SYS_CTRL); > val |= ELBI_SYS_CTRL_LT_ENABLE; > - writel(val, pcie->elbi + ELBI_SYS_CTRL); > + writel(val, pci->elbi_base + ELBI_SYS_CTRL); Since the driver was checking for the ELBI presence always and the DWC core is handling it optionally now, you could add a check here to make sure that the 'elbi_base' is pointing to a valid memory. - Mani
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index e4d3366ead1f..258b2d615080 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -265,7 +265,6 @@ struct qcom_pcie_cfg { struct qcom_pcie { struct dw_pcie *pci; void __iomem *parf; /* DT parf */ - void __iomem *elbi; /* DT elbi */ void __iomem *mhi; union qcom_pcie_resources res; struct phy *phy; @@ -390,12 +389,13 @@ static void qcom_pcie_configure_dbi_atu_base(struct qcom_pcie *pcie) static void qcom_pcie_2_1_0_ltssm_enable(struct qcom_pcie *pcie) { + struct dw_pcie *pci = pcie->pci; u32 val; /* enable link training */ - val = readl(pcie->elbi + ELBI_SYS_CTRL); + val = readl(pci->elbi_base + ELBI_SYS_CTRL); val |= ELBI_SYS_CTRL_LT_ENABLE; - writel(val, pcie->elbi + ELBI_SYS_CTRL); + writel(val, pci->elbi_base + ELBI_SYS_CTRL); } static int qcom_pcie_get_resources_2_1_0(struct qcom_pcie *pcie) @@ -1631,12 +1631,6 @@ static int qcom_pcie_probe(struct platform_device *pdev) goto err_pm_runtime_put; } - pcie->elbi = devm_platform_ioremap_resource_byname(pdev, "elbi"); - if (IS_ERR(pcie->elbi)) { - ret = PTR_ERR(pcie->elbi); - goto err_pm_runtime_put; - } - /* MHI region is optional */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mhi"); if (res) {
Instead of using qcom ELBI resources mapping use dwc mapping as this ELBI is dwc specific. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> --- drivers/pci/controller/dwc/pcie-qcom.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-)