@@ -28,6 +28,13 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ vph_pwr: vph-pwr-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vph_pwr";
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
vreg_conn_1p8: vreg_conn_1p8 {
compatible = "regulator-fixed";
regulator-name = "vreg_conn_1p8";
@@ -128,6 +135,30 @@ dp1_connector_in: endpoint {
};
};
};
+
+ dp-dsi0-connector {
+ compatible = "dp-connector";
+ label = "DSI0";
+ type = "full-size";
+
+ port {
+ dp_dsi0_connector_in: endpoint {
+ remote-endpoint = <&anx7625_1_out>;
+ };
+ };
+ };
+
+ dp-dsi1-connector {
+ compatible = "dp-connector";
+ label = "DSI1";
+ type = "full-size";
+
+ port {
+ dp_dsi1_connector_in: endpoint {
+ remote-endpoint = <&anx7625_2_out>;
+ };
+ };
+ };
};
&apps_rsc {
@@ -517,9 +548,135 @@ &i2c11 {
&i2c18 {
clock-frequency = <400000>;
- pinctrl-0 = <&qup_i2c18_default>;
+ pinctrl-0 = <&qup_i2c18_default>,
+ <&io_expander_intr_active>,
+ <&io_expander_reset_active>;
pinctrl-names = "default";
+
status = "okay";
+
+ io_expander: gpio@74 {
+ compatible = "ti,tca9539";
+ reg = <0x74>;
+ interrupts-extended = <&tlmm 98 IRQ_TYPE_EDGE_BOTH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ gpio2-hog {
+ gpio-hog;
+ gpios = <2 GPIO_ACTIVE_HIGH>;
+ input;
+ line-name = "dsi0_int_pin";
+ };
+
+ gpio3-hog {
+ gpio-hog;
+ gpios = <3 GPIO_ACTIVE_LOW>;
+ output-high;
+ line-name = "dsi0_cbl_det_pin";
+ };
+
+ gpio10-hog {
+ gpio-hog;
+ gpios = <10 GPIO_ACTIVE_HIGH>;
+ input;
+ line-name = "dsi1_int_pin";
+ };
+
+ gpio11-hog {
+ gpio-hog;
+ gpios = <11 GPIO_ACTIVE_LOW>;
+ output-high;
+ line-name = "dsi1_cbl_det_pin";
+ };
+ };
+
+ i2c-mux@70 {
+ compatible = "nxp,pca9543";
+ #address-cells = <1>;
+
+ #size-cells = <0>;
+ reg = <0x70>;
+
+ i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ anx_bridge1: anx7625@58 {
+ compatible = "analogix,anx7625";
+ reg = <0x58>;
+ interrupts-extended = <&io_expander 2 IRQ_TYPE_EDGE_FALLING>;
+ enable-gpios = <&io_expander 1 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&io_expander 0 GPIO_ACTIVE_HIGH>;
+ vdd10-supply = <&vph_pwr>;
+ vdd18-supply = <&vph_pwr>;
+ vdd33-supply = <&vph_pwr>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dsi2dp_bridge_1_in: port@0 {
+ reg = <0>;
+
+ anx7625_1_in: endpoint {
+ remote-endpoint = <&mdss0_dsi0_out>;
+ };
+ };
+
+ dsi2dp_bridge_1_out: port@1 {
+ reg = <1>;
+
+ anx7625_1_out: endpoint {
+ remote-endpoint = <&dp_dsi0_connector_in>;
+ };
+ };
+ };
+ };
+ };
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ anx_bridge2: anx7625@58 {
+ compatible = "analogix,anx7625";
+ reg = <0x58>;
+ interrupts-extended = <&io_expander 10 IRQ_TYPE_EDGE_FALLING>;
+ enable-gpios = <&io_expander 9 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&io_expander 8 GPIO_ACTIVE_HIGH>;
+ vdd10-supply = <&vph_pwr>;
+ vdd18-supply = <&vph_pwr>;
+ vdd33-supply = <&vph_pwr>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ dsi2dp_bridge_2_in: port@0 {
+ reg = <0>;
+
+ anx7625_2_in: endpoint {
+ remote-endpoint = <&mdss0_dsi1_out>;
+ };
+ };
+
+ dsi2dp_bridge_2_out: port@1 {
+ reg = <1>;
+
+ anx7625_2_out: endpoint {
+ remote-endpoint = <&dp_dsi1_connector_in>;
+ };
+ };
+ };
+ };
+ };
+ };
+
};
&mdss0 {
@@ -566,6 +723,40 @@ &mdss0_dp1_phy {
status = "okay";
};
+&mdss0_dsi0 {
+ vdda-supply = <&vreg_l1c>;
+
+ status = "okay";
+};
+
+&mdss0_dsi0_out {
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&anx7625_1_in>;
+};
+
+&mdss0_dsi0_phy {
+ vdds-supply = <&vreg_l4a>;
+
+ status = "okay";
+};
+
+&mdss0_dsi1 {
+ vdda-supply = <&vreg_l1c>;
+
+ status = "okay";
+};
+
+&mdss0_dsi1_out {
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&anx7625_2_in>;
+};
+
+&mdss0_dsi1_phy {
+ vdds-supply = <&vreg_l4a>;
+
+ status = "okay";
+};
+
&pmm8654au_0_gpios {
gpio-line-names = "DS_EN",
"POFF_COMPLETE",
@@ -714,6 +905,21 @@ ethernet0_mdio: ethernet0-mdio-pins {
};
};
+ io_expander_intr_active: io-expander-intr-active-state {
+ pins = "gpio98";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ io_expander_reset_active: io-expander-reset-active-state {
+ pins = "gpio97";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ output-high;
+ };
+
qup_uart10_default: qup-uart10-state {
pins = "gpio46", "gpio47";
function = "qup1_se3";
Add anx7625 DSI to DP bridge device nodes. Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com> --- arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi | 208 ++++++++++++++++++++- 1 file changed, 207 insertions(+), 1 deletion(-)