| Message ID | 20250313034524.3069690-4-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | accel/tcg, codebase: Build once patches | expand |
On 3/12/25 20:44, Richard Henderson wrote: > Use vaddr only for the newest api, because it has the least > number of uses and therefore is the easiest to audit. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > accel/tcg/atomic_template.h | 16 ++++++------- > include/exec/cpu_ldst.h | 48 ++++++++++++++++++------------------- > accel/tcg/cputlb.c | 8 +++---- > accel/tcg/user-exec.c | 8 +++---- > accel/tcg/ldst_common.c.inc | 20 ++++++++-------- > 5 files changed, 50 insertions(+), 50 deletions(-) > > diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h > index 89593b2502..08a475c10c 100644 > --- a/accel/tcg/atomic_template.h > +++ b/accel/tcg/atomic_template.h > @@ -77,7 +77,7 @@ > # define END _le > #endif > > -ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr, > +ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, vaddr addr, > ABI_TYPE cmpv, ABI_TYPE newv, > MemOpIdx oi, uintptr_t retaddr) > { > @@ -101,7 +101,7 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr, > } > > #if DATA_SIZE < 16 > -ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val, > +ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, vaddr addr, ABI_TYPE val, > MemOpIdx oi, uintptr_t retaddr) > { > DATA_TYPE *haddr = atomic_mmu_lookup(env_cpu(env), addr, oi, > @@ -120,7 +120,7 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val, > } > > #define GEN_ATOMIC_HELPER(X) \ > -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ > +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ > ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) \ > { \ > DATA_TYPE *haddr, ret; \ > @@ -156,7 +156,7 @@ GEN_ATOMIC_HELPER(xor_fetch) > * of CF_PARALLEL's value, we'll trace just a read and a write. > */ > #define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \ > -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ > +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ > ABI_TYPE xval, MemOpIdx oi, uintptr_t retaddr) \ > { \ > XDATA_TYPE *haddr, cmp, old, new, val = xval; \ > @@ -202,7 +202,7 @@ GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new) > # define END _be > #endif > > -ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr, > +ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, vaddr addr, > ABI_TYPE cmpv, ABI_TYPE newv, > MemOpIdx oi, uintptr_t retaddr) > { > @@ -226,7 +226,7 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr, > } > > #if DATA_SIZE < 16 > -ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val, > +ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, vaddr addr, ABI_TYPE val, > MemOpIdx oi, uintptr_t retaddr) > { > DATA_TYPE *haddr = atomic_mmu_lookup(env_cpu(env), addr, oi, > @@ -245,7 +245,7 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val, > } > > #define GEN_ATOMIC_HELPER(X) \ > -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ > +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ > ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) \ > { \ > DATA_TYPE *haddr, ret; \ > @@ -278,7 +278,7 @@ GEN_ATOMIC_HELPER(xor_fetch) > * of CF_PARALLEL's value, we'll trace just a read and a write. > */ > #define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \ > -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ > +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ > ABI_TYPE xval, MemOpIdx oi, uintptr_t retaddr) \ > { \ > XDATA_TYPE *haddr, ldo, ldn, old, new, val = xval; \ > diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h > index 769e9fc440..ddd8e0cf48 100644 > --- a/include/exec/cpu_ldst.h > +++ b/include/exec/cpu_ldst.h > @@ -157,48 +157,48 @@ void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, > void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, > int mmu_idx, uintptr_t ra); > > -uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); > -uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); > -uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); > -uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); > -Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_t ra); > +uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra); > +uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra); > +uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra); > +uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra); > +Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra); > > -void cpu_stb_mmu(CPUArchState *env, abi_ptr ptr, uint8_t val, > +void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val, > MemOpIdx oi, uintptr_t ra); > -void cpu_stw_mmu(CPUArchState *env, abi_ptr ptr, uint16_t val, > +void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val, > MemOpIdx oi, uintptr_t ra); > -void cpu_stl_mmu(CPUArchState *env, abi_ptr ptr, uint32_t val, > +void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val, > MemOpIdx oi, uintptr_t ra); > -void cpu_stq_mmu(CPUArchState *env, abi_ptr ptr, uint64_t val, > +void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val, > MemOpIdx oi, uintptr_t ra); > -void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val, > +void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val, > MemOpIdx oi, uintptr_t ra); > > -uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, abi_ptr addr, > +uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, vaddr addr, > uint32_t cmpv, uint32_t newv, > MemOpIdx oi, uintptr_t retaddr); > -uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, abi_ptr addr, > +uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, vaddr addr, > uint32_t cmpv, uint32_t newv, > MemOpIdx oi, uintptr_t retaddr); > -uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, abi_ptr addr, > +uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, vaddr addr, > uint32_t cmpv, uint32_t newv, > MemOpIdx oi, uintptr_t retaddr); > -uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, abi_ptr addr, > +uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, vaddr addr, > uint64_t cmpv, uint64_t newv, > MemOpIdx oi, uintptr_t retaddr); > -uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, abi_ptr addr, > +uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, vaddr addr, > uint32_t cmpv, uint32_t newv, > MemOpIdx oi, uintptr_t retaddr); > -uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, abi_ptr addr, > +uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, vaddr addr, > uint32_t cmpv, uint32_t newv, > MemOpIdx oi, uintptr_t retaddr); > -uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, abi_ptr addr, > +uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, vaddr addr, > uint64_t cmpv, uint64_t newv, > MemOpIdx oi, uintptr_t retaddr); > > #define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \ > TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \ > - (CPUArchState *env, abi_ptr addr, TYPE val, \ > + (CPUArchState *env, vaddr addr, TYPE val, \ > MemOpIdx oi, uintptr_t retaddr); > > #ifdef CONFIG_ATOMIC64 > @@ -244,10 +244,10 @@ GEN_ATOMIC_HELPER_ALL(xchg) > #undef GEN_ATOMIC_HELPER_ALL > #undef GEN_ATOMIC_HELPER > > -Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, abi_ptr addr, > +Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, vaddr addr, > Int128 cmpv, Int128 newv, > MemOpIdx oi, uintptr_t retaddr); > -Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, > +Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr, > Int128 cmpv, Int128 newv, > MemOpIdx oi, uintptr_t retaddr); > > @@ -297,13 +297,13 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, > # define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra > #endif > > -uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, > +uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra); > -uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, > +uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra); > -uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, > +uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra); > -uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, > +uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra); > > uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); > diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c > index fb22048876..b03998f926 100644 > --- a/accel/tcg/cputlb.c > +++ b/accel/tcg/cputlb.c > @@ -2925,25 +2925,25 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) > return do_ld8_mmu(cs, addr, oi, 0, MMU_INST_FETCH); > } > > -uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, > +uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t retaddr) > { > return do_ld1_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); > } > > -uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, > +uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t retaddr) > { > return do_ld2_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); > } > > -uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, > +uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t retaddr) > { > return do_ld4_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); > } > > -uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, > +uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t retaddr) > { > return do_ld8_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); > diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c > index 2322181b15..3f63b194bb 100644 > --- a/accel/tcg/user-exec.c > +++ b/accel/tcg/user-exec.c > @@ -1254,7 +1254,7 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr) > return ret; > } > > -uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, > +uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra) > { > void *haddr; > @@ -1266,7 +1266,7 @@ uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, > return ret; > } > > -uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, > +uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra) > { > void *haddr; > @@ -1281,7 +1281,7 @@ uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, > return ret; > } > > -uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, > +uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra) > { > void *haddr; > @@ -1296,7 +1296,7 @@ uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, > return ret; > } > > -uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, > +uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra) > { > void *haddr; > diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc > index ebbf380d76..0447c0bb92 100644 > --- a/accel/tcg/ldst_common.c.inc > +++ b/accel/tcg/ldst_common.c.inc > @@ -135,7 +135,7 @@ static void plugin_load_cb(CPUArchState *env, abi_ptr addr, > } > } > > -uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_t ra) > +uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) > { > uint8_t ret; > > @@ -145,7 +145,7 @@ uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_t ra) > return ret; > } > > -uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr addr, > +uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra) > { > uint16_t ret; > @@ -156,7 +156,7 @@ uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr addr, > return ret; > } > > -uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr addr, > +uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra) > { > uint32_t ret; > @@ -167,7 +167,7 @@ uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr addr, > return ret; > } > > -uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr addr, > +uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra) > { > uint64_t ret; > @@ -178,7 +178,7 @@ uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr addr, > return ret; > } > > -Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, > +Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, > MemOpIdx oi, uintptr_t ra) > { > Int128 ret; > @@ -205,14 +205,14 @@ static void plugin_store_cb(CPUArchState *env, abi_ptr addr, > } > } > > -void cpu_stb_mmu(CPUArchState *env, abi_ptr addr, uint8_t val, > +void cpu_stb_mmu(CPUArchState *env, vaddr addr, uint8_t val, > MemOpIdx oi, uintptr_t retaddr) > { > helper_stb_mmu(env, addr, val, oi, retaddr); > plugin_store_cb(env, addr, val, 0, oi); > } > > -void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint16_t val, > +void cpu_stw_mmu(CPUArchState *env, vaddr addr, uint16_t val, > MemOpIdx oi, uintptr_t retaddr) > { > tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_16); > @@ -220,7 +220,7 @@ void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint16_t val, > plugin_store_cb(env, addr, val, 0, oi); > } > > -void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint32_t val, > +void cpu_stl_mmu(CPUArchState *env, vaddr addr, uint32_t val, > MemOpIdx oi, uintptr_t retaddr) > { > tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_32); > @@ -228,7 +228,7 @@ void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint32_t val, > plugin_store_cb(env, addr, val, 0, oi); > } > > -void cpu_stq_mmu(CPUArchState *env, abi_ptr addr, uint64_t val, > +void cpu_stq_mmu(CPUArchState *env, vaddr addr, uint64_t val, > MemOpIdx oi, uintptr_t retaddr) > { > tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_64); > @@ -236,7 +236,7 @@ void cpu_stq_mmu(CPUArchState *env, abi_ptr addr, uint64_t val, > plugin_store_cb(env, addr, val, 0, oi); > } > > -void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val, > +void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val, > MemOpIdx oi, uintptr_t retaddr) > { > tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_128); Restricting 64bit targets on 32bit hosts comes with nice benefits. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h index 89593b2502..08a475c10c 100644 --- a/accel/tcg/atomic_template.h +++ b/accel/tcg/atomic_template.h @@ -77,7 +77,7 @@ # define END _le #endif -ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr, +ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, vaddr addr, ABI_TYPE cmpv, ABI_TYPE newv, MemOpIdx oi, uintptr_t retaddr) { @@ -101,7 +101,7 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr, } #if DATA_SIZE < 16 -ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val, +ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, vaddr addr, ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) { DATA_TYPE *haddr = atomic_mmu_lookup(env_cpu(env), addr, oi, @@ -120,7 +120,7 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val, } #define GEN_ATOMIC_HELPER(X) \ -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) \ { \ DATA_TYPE *haddr, ret; \ @@ -156,7 +156,7 @@ GEN_ATOMIC_HELPER(xor_fetch) * of CF_PARALLEL's value, we'll trace just a read and a write. */ #define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \ -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ ABI_TYPE xval, MemOpIdx oi, uintptr_t retaddr) \ { \ XDATA_TYPE *haddr, cmp, old, new, val = xval; \ @@ -202,7 +202,7 @@ GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new) # define END _be #endif -ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr, +ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, vaddr addr, ABI_TYPE cmpv, ABI_TYPE newv, MemOpIdx oi, uintptr_t retaddr) { @@ -226,7 +226,7 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr addr, } #if DATA_SIZE < 16 -ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val, +ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, vaddr addr, ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) { DATA_TYPE *haddr = atomic_mmu_lookup(env_cpu(env), addr, oi, @@ -245,7 +245,7 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr addr, ABI_TYPE val, } #define GEN_ATOMIC_HELPER(X) \ -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ ABI_TYPE val, MemOpIdx oi, uintptr_t retaddr) \ { \ DATA_TYPE *haddr, ret; \ @@ -278,7 +278,7 @@ GEN_ATOMIC_HELPER(xor_fetch) * of CF_PARALLEL's value, we'll trace just a read and a write. */ #define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \ -ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr addr, \ +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, vaddr addr, \ ABI_TYPE xval, MemOpIdx oi, uintptr_t retaddr) \ { \ XDATA_TYPE *haddr, ldo, ldn, old, new, val = xval; \ diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 769e9fc440..ddd8e0cf48 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -157,48 +157,48 @@ void cpu_stl_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint32_t val, void cpu_stq_le_mmuidx_ra(CPUArchState *env, abi_ptr ptr, uint64_t val, int mmu_idx, uintptr_t ra); -uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); -uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); -uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); -uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr ptr, MemOpIdx oi, uintptr_t ra); -Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_t ra); +uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra); +uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra); +uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra); +uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra); +Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra); -void cpu_stb_mmu(CPUArchState *env, abi_ptr ptr, uint8_t val, +void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val, MemOpIdx oi, uintptr_t ra); -void cpu_stw_mmu(CPUArchState *env, abi_ptr ptr, uint16_t val, +void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val, MemOpIdx oi, uintptr_t ra); -void cpu_stl_mmu(CPUArchState *env, abi_ptr ptr, uint32_t val, +void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val, MemOpIdx oi, uintptr_t ra); -void cpu_stq_mmu(CPUArchState *env, abi_ptr ptr, uint64_t val, +void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val, MemOpIdx oi, uintptr_t ra); -void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val, +void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val, MemOpIdx oi, uintptr_t ra); -uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, vaddr addr, uint32_t cmpv, uint32_t newv, MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, vaddr addr, uint32_t cmpv, uint32_t newv, MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, vaddr addr, uint32_t cmpv, uint32_t newv, MemOpIdx oi, uintptr_t retaddr); -uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, vaddr addr, uint64_t cmpv, uint64_t newv, MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, vaddr addr, uint32_t cmpv, uint32_t newv, MemOpIdx oi, uintptr_t retaddr); -uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, vaddr addr, uint32_t cmpv, uint32_t newv, MemOpIdx oi, uintptr_t retaddr); -uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, vaddr addr, uint64_t cmpv, uint64_t newv, MemOpIdx oi, uintptr_t retaddr); #define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \ TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \ - (CPUArchState *env, abi_ptr addr, TYPE val, \ + (CPUArchState *env, vaddr addr, TYPE val, \ MemOpIdx oi, uintptr_t retaddr); #ifdef CONFIG_ATOMIC64 @@ -244,10 +244,10 @@ GEN_ATOMIC_HELPER_ALL(xchg) #undef GEN_ATOMIC_HELPER_ALL #undef GEN_ATOMIC_HELPER -Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, abi_ptr addr, +Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, vaddr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); -Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, +Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr, Int128 cmpv, Int128 newv, MemOpIdx oi, uintptr_t retaddr); @@ -297,13 +297,13 @@ Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, abi_ptr addr, # define cpu_stq_mmuidx_ra cpu_stq_le_mmuidx_ra #endif -uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, +uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra); -uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, +uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra); -uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra); -uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra); uint32_t cpu_ldub_code(CPUArchState *env, abi_ptr addr); diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index fb22048876..b03998f926 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2925,25 +2925,25 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr addr) return do_ld8_mmu(cs, addr, oi, 0, MMU_INST_FETCH); } -uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, +uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t retaddr) { return do_ld1_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); } -uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, +uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t retaddr) { return do_ld2_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); } -uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t retaddr) { return do_ld4_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); } -uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t retaddr) { return do_ld8_mmu(env_cpu(env), addr, oi, retaddr, MMU_INST_FETCH); diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 2322181b15..3f63b194bb 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -1254,7 +1254,7 @@ uint64_t cpu_ldq_code(CPUArchState *env, abi_ptr ptr) return ret; } -uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, +uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { void *haddr; @@ -1266,7 +1266,7 @@ uint8_t cpu_ldb_code_mmu(CPUArchState *env, abi_ptr addr, return ret; } -uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, +uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { void *haddr; @@ -1281,7 +1281,7 @@ uint16_t cpu_ldw_code_mmu(CPUArchState *env, abi_ptr addr, return ret; } -uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { void *haddr; @@ -1296,7 +1296,7 @@ uint32_t cpu_ldl_code_mmu(CPUArchState *env, abi_ptr addr, return ret; } -uint64_t cpu_ldq_code_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { void *haddr; diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc index ebbf380d76..0447c0bb92 100644 --- a/accel/tcg/ldst_common.c.inc +++ b/accel/tcg/ldst_common.c.inc @@ -135,7 +135,7 @@ static void plugin_load_cb(CPUArchState *env, abi_ptr addr, } } -uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_t ra) +uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { uint8_t ret; @@ -145,7 +145,7 @@ uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr, MemOpIdx oi, uintptr_t ra) return ret; } -uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr addr, +uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { uint16_t ret; @@ -156,7 +156,7 @@ uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr addr, return ret; } -uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr addr, +uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { uint32_t ret; @@ -167,7 +167,7 @@ uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr addr, return ret; } -uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr addr, +uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { uint64_t ret; @@ -178,7 +178,7 @@ uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr addr, return ret; } -Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, +Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra) { Int128 ret; @@ -205,14 +205,14 @@ static void plugin_store_cb(CPUArchState *env, abi_ptr addr, } } -void cpu_stb_mmu(CPUArchState *env, abi_ptr addr, uint8_t val, +void cpu_stb_mmu(CPUArchState *env, vaddr addr, uint8_t val, MemOpIdx oi, uintptr_t retaddr) { helper_stb_mmu(env, addr, val, oi, retaddr); plugin_store_cb(env, addr, val, 0, oi); } -void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint16_t val, +void cpu_stw_mmu(CPUArchState *env, vaddr addr, uint16_t val, MemOpIdx oi, uintptr_t retaddr) { tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_16); @@ -220,7 +220,7 @@ void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint16_t val, plugin_store_cb(env, addr, val, 0, oi); } -void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint32_t val, +void cpu_stl_mmu(CPUArchState *env, vaddr addr, uint32_t val, MemOpIdx oi, uintptr_t retaddr) { tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_32); @@ -228,7 +228,7 @@ void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint32_t val, plugin_store_cb(env, addr, val, 0, oi); } -void cpu_stq_mmu(CPUArchState *env, abi_ptr addr, uint64_t val, +void cpu_stq_mmu(CPUArchState *env, vaddr addr, uint64_t val, MemOpIdx oi, uintptr_t retaddr) { tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_64); @@ -236,7 +236,7 @@ void cpu_stq_mmu(CPUArchState *env, abi_ptr addr, uint64_t val, plugin_store_cb(env, addr, val, 0, oi); } -void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val, +void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val, MemOpIdx oi, uintptr_t retaddr) { tcg_debug_assert((get_memop(oi) & MO_SIZE) == MO_128);
Use vaddr only for the newest api, because it has the least number of uses and therefore is the easiest to audit. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- accel/tcg/atomic_template.h | 16 ++++++------- include/exec/cpu_ldst.h | 48 ++++++++++++++++++------------------- accel/tcg/cputlb.c | 8 +++---- accel/tcg/user-exec.c | 8 +++---- accel/tcg/ldst_common.c.inc | 20 ++++++++-------- 5 files changed, 50 insertions(+), 50 deletions(-)