diff mbox

[v6,1/8] MFD: add bindings for STM32 Timers driver

Message ID 1481292919-26587-2-git-send-email-benjamin.gaignard@st.com
State Accepted
Commit 8f9359c6c6a00b43273480a5cf5b0f240aa3b648
Headers show

Commit Message

Benjamin Gaignard Dec. 9, 2016, 2:15 p.m. UTC
Add bindings information for STM32 Timers

version 6:
- rename stm32-gtimer to stm32-timers
- change compatible
- add description about the IPs

version 2:
- rename stm32-mfd-timer to stm32-gptimer
- only keep one compatible string

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>

---
 .../devicetree/bindings/mfd/stm32-timers.txt       | 46 ++++++++++++++++++++++
 1 file changed, 46 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt

-- 
1.9.1

Comments

Benjamin Gaignard Dec. 13, 2016, 9:29 a.m. UTC | #1
2016-12-12 19:51 GMT+01:00 Rob Herring <robh@kernel.org>:
> On Fri, Dec 09, 2016 at 03:15:12PM +0100, Benjamin Gaignard wrote:

>> Add bindings information for STM32 Timers

>>

>> version 6:

>> - rename stm32-gtimer to stm32-timers

>> - change compatible

>> - add description about the IPs

>>

>> version 2:

>> - rename stm32-mfd-timer to stm32-gptimer

>> - only keep one compatible string

>>

>> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>

>> ---

>>  .../devicetree/bindings/mfd/stm32-timers.txt       | 46 ++++++++++++++++++++++

>>  1 file changed, 46 insertions(+)

>>  create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt

>>

>> diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt

>> new file mode 100644

>> index 0000000..b30868e

>> --- /dev/null

>> +++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt

>> @@ -0,0 +1,46 @@

>> +STM32 Timers driver bindings

>> +

>> +This IP provides 3 types of timer along with PWM functionality:

>> +- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable

>> +  prescaler, break input feature, PWM outputs and complementary PWM ouputs channels.

>> +- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a

>> +  programmable prescaler and PWM outputs.

>> +- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.

>> +

>> +Required parameters:

>> +- compatible: must be "st,stm32-timers"

>> +

>> +- reg:                       Physical base address and length of the controller's

>> +                     registers.

>> +- clock-names:               Set to "clk_int".

>

> 'clk' is redundant. Also, you don't really need -names when there is

> only one of them.


I use devm_regmap_init_mmio_clk() which get the clock by it name so
I have to define it in DT.

>> +- clocks:            Phandle to the clock used by the timer module.

>> +                     For Clk properties, please refer to ../clock/clock-bindings.txt

>> +

>> +Optional parameters:

>> +- resets:            Phandle to the parent reset controller.

>> +                     See ../reset/st,stm32-rcc.txt

>> +

>> +Optional subnodes:

>> +- pwm:                       See ../pwm/pwm-stm32.txt

>> +- timer:             See ../iio/timer/stm32-timer-trigger.txt

>> +

>> +Example:

>> +     timers@40010000 {

>> +             #address-cells = <1>;

>> +             #size-cells = <0>;

>> +             compatible = "st,stm32-timers";

>> +             reg = <0x40010000 0x400>;

>> +             clocks = <&rcc 0 160>;

>> +             clock-names = "clk_int";

>> +

>> +             pwm {

>> +                     compatible = "st,stm32-pwm";

>> +                     pinctrl-0       = <&pwm1_pins>;

>> +                     pinctrl-names   = "default";

>> +             };

>> +

>> +             timer {

>> +                     compatible = "st,stm32-timer-trigger";

>> +                     reg = <0>;

>

> You don't need reg here as there is only one. In turn, you don't need

> #address-cells or #size-cells.


I use "reg" to set each timer configuration.
From hardware point of view they are all the same except for which hardware
signals they could consume and/or send.
"reg" is used as index of the two tables in driver code.

>

>> +             };

>> +     };

>> --

>> 1.9.1

>>
Rob Herring (Arm) Dec. 13, 2016, 9:07 p.m. UTC | #2
On Tue, Dec 13, 2016 at 3:29 AM, Benjamin Gaignard
<benjamin.gaignard@linaro.org> wrote:
> 2016-12-12 19:51 GMT+01:00 Rob Herring <robh@kernel.org>:

>> On Fri, Dec 09, 2016 at 03:15:12PM +0100, Benjamin Gaignard wrote:

>>> Add bindings information for STM32 Timers

>>>

>>> version 6:

>>> - rename stm32-gtimer to stm32-timers

>>> - change compatible

>>> - add description about the IPs

>>>

>>> version 2:

>>> - rename stm32-mfd-timer to stm32-gptimer

>>> - only keep one compatible string

>>>

>>> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>

>>> ---

>>>  .../devicetree/bindings/mfd/stm32-timers.txt       | 46 ++++++++++++++++++++++

>>>  1 file changed, 46 insertions(+)

>>>  create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt

>>>

>>> diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt

>>> new file mode 100644

>>> index 0000000..b30868e

>>> --- /dev/null

>>> +++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt

>>> @@ -0,0 +1,46 @@

>>> +STM32 Timers driver bindings

>>> +

>>> +This IP provides 3 types of timer along with PWM functionality:

>>> +- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable

>>> +  prescaler, break input feature, PWM outputs and complementary PWM ouputs channels.

>>> +- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a

>>> +  programmable prescaler and PWM outputs.

>>> +- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.

>>> +

>>> +Required parameters:

>>> +- compatible: must be "st,stm32-timers"

>>> +

>>> +- reg:                       Physical base address and length of the controller's

>>> +                     registers.

>>> +- clock-names:               Set to "clk_int".

>>

>> 'clk' is redundant. Also, you don't really need -names when there is

>> only one of them.

>

> I use devm_regmap_init_mmio_clk() which get the clock by it name so

> I have to define it in DT.


Are you sure NULL is not allowed? I don't know, but at least clk_get()
allows NULL.

It's fine to keep, just drop the "clk_" part.

>

>>> +- clocks:            Phandle to the clock used by the timer module.

>>> +                     For Clk properties, please refer to ../clock/clock-bindings.txt

>>> +

>>> +Optional parameters:

>>> +- resets:            Phandle to the parent reset controller.

>>> +                     See ../reset/st,stm32-rcc.txt

>>> +

>>> +Optional subnodes:

>>> +- pwm:                       See ../pwm/pwm-stm32.txt

>>> +- timer:             See ../iio/timer/stm32-timer-trigger.txt

>>> +

>>> +Example:

>>> +     timers@40010000 {

>>> +             #address-cells = <1>;

>>> +             #size-cells = <0>;

>>> +             compatible = "st,stm32-timers";

>>> +             reg = <0x40010000 0x400>;

>>> +             clocks = <&rcc 0 160>;

>>> +             clock-names = "clk_int";

>>> +

>>> +             pwm {

>>> +                     compatible = "st,stm32-pwm";

>>> +                     pinctrl-0       = <&pwm1_pins>;

>>> +                     pinctrl-names   = "default";

>>> +             };

>>> +

>>> +             timer {

>>> +                     compatible = "st,stm32-timer-trigger";

>>> +                     reg = <0>;

>>

>> You don't need reg here as there is only one. In turn, you don't need

>> #address-cells or #size-cells.

>

> I use "reg" to set each timer configuration.

> From hardware point of view they are all the same except for which hardware

> signals they could consume and/or send.


This sounds okay, but...

> "reg" is used as index of the two tables in driver code.


this statement doesn't really sound like valid use of reg.

If you keep reg, then the node needs a unit address (timer@0).

Rob
diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
new file mode 100644
index 0000000..b30868e
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
@@ -0,0 +1,46 @@ 
+STM32 Timers driver bindings
+
+This IP provides 3 types of timer along with PWM functionality:
+- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable
+  prescaler, break input feature, PWM outputs and complementary PWM ouputs channels.
+- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a
+  programmable prescaler and PWM outputs.
+- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.
+
+Required parameters:
+- compatible: must be "st,stm32-timers"
+
+- reg:			Physical base address and length of the controller's
+			registers.
+- clock-names: 		Set to "clk_int".
+- clocks: 		Phandle to the clock used by the timer module.
+			For Clk properties, please refer to ../clock/clock-bindings.txt
+
+Optional parameters:
+- resets:		Phandle to the parent reset controller.
+			See ../reset/st,stm32-rcc.txt
+
+Optional subnodes:
+- pwm:			See ../pwm/pwm-stm32.txt
+- timer:		See ../iio/timer/stm32-timer-trigger.txt
+
+Example:
+	timers@40010000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "st,stm32-timers";
+		reg = <0x40010000 0x400>;
+		clocks = <&rcc 0 160>;
+		clock-names = "clk_int";
+
+		pwm {
+			compatible = "st,stm32-pwm";
+			pinctrl-0	= <&pwm1_pins>;
+			pinctrl-names	= "default";
+		};
+
+		timer {
+			compatible = "st,stm32-timer-trigger";
+			reg = <0>;
+		};
+	};