| Message ID | 20250409072604.3410459-1-ziniu.wang_1@nxp.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] mmc: sdhci-esdhc-imx: calculate data timeout value based on clock | expand |
On 9/04/25 10:26, ziniu.wang_1@nxp.com wrote: > From: Luke Wang <ziniu.wang_1@nxp.com> > > Calculate data timeout value based on clock instead of using max value. > > Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com> We overlooked that Haibo wanted the "bit[23]" comment dropped, but nevertheless: Acked-by: Adrian Hunter <adrian.hunter@intel.com> > --- > v1->v2: > * Added SDHCI_TIMEOUT_CONTROL to esdhc_writeb_le() > * Removed esdhc_set_timeout() to use common __sdhci_set_timeout(). > --- > drivers/mmc/host/sdhci-esdhc-imx.c | 24 ++++++++++++------------ > 1 file changed, 12 insertions(+), 12 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c > index ff78a7c6a04c..a34cabee5916 100644 > --- a/drivers/mmc/host/sdhci-esdhc-imx.c > +++ b/drivers/mmc/host/sdhci-esdhc-imx.c > @@ -870,6 +870,16 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) > > esdhc_clrset_le(host, mask, new_val, reg); > return; > + case SDHCI_TIMEOUT_CONTROL: > + /* > + * ESDHC_SYSTEM_CONTROL bit[23] used to control hardware reset > + * pin of the card. Write 0 to bit[23] will reset the card. > + * Only write DTOCV field here. > + */ > + esdhc_clrset_le(host, ESDHC_SYS_CTRL_DTOCV_MASK, > + FIELD_PREP(ESDHC_SYS_CTRL_DTOCV_MASK, val), > + ESDHC_SYSTEM_CONTROL); > + return; > case SDHCI_SOFTWARE_RESET: > if (val & SDHCI_RESET_DATA) > new_val = readl(host->ioaddr + SDHCI_HOST_CONTROL); > @@ -1385,17 +1395,6 @@ static unsigned int esdhc_get_max_timeout_count(struct sdhci_host *host) > return esdhc_is_usdhc(imx_data) ? 1 << 29 : 1 << 27; > } > > -static void esdhc_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) > -{ > - struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > - struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); > - > - /* use maximum timeout counter */ > - esdhc_clrset_le(host, ESDHC_SYS_CTRL_DTOCV_MASK, > - esdhc_is_usdhc(imx_data) ? 0xF0000 : 0xE0000, > - ESDHC_SYSTEM_CONTROL); > -} > - > static u32 esdhc_cqhci_irq(struct sdhci_host *host, u32 intmask) > { > int cmd_error = 0; > @@ -1432,7 +1431,6 @@ static struct sdhci_ops sdhci_esdhc_ops = { > .get_min_clock = esdhc_pltfm_get_min_clock, > .get_max_timeout_count = esdhc_get_max_timeout_count, > .get_ro = esdhc_pltfm_get_ro, > - .set_timeout = esdhc_set_timeout, > .set_bus_width = esdhc_pltfm_set_bus_width, > .set_uhs_signaling = esdhc_set_uhs_signaling, > .reset = esdhc_reset, > @@ -1777,6 +1775,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) > * to distinguish the card type. > */ > host->mmc_host_ops.init_card = usdhc_init_card; > + > + host->max_timeout_count = 0xF; > } > > if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING)
On Tue, 22 Apr 2025 at 12:24, Adrian Hunter <adrian.hunter@intel.com> wrote: > > On 9/04/25 10:26, ziniu.wang_1@nxp.com wrote: > > From: Luke Wang <ziniu.wang_1@nxp.com> > > > > Calculate data timeout value based on clock instead of using max value. > > > > Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com> > > We overlooked that Haibo wanted the "bit[23]" comment dropped, > but nevertheless: I have dropped the comment when applying, no need for a re-send. I also added Haibo's reviewed-by tag. > > Acked-by: Adrian Hunter <adrian.hunter@intel.com> Applied for next, thanks! Kind regards Uffe > > > --- > > v1->v2: > > * Added SDHCI_TIMEOUT_CONTROL to esdhc_writeb_le() > > * Removed esdhc_set_timeout() to use common __sdhci_set_timeout(). > > --- > > drivers/mmc/host/sdhci-esdhc-imx.c | 24 ++++++++++++------------ > > 1 file changed, 12 insertions(+), 12 deletions(-) > > > > diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c > > index ff78a7c6a04c..a34cabee5916 100644 > > --- a/drivers/mmc/host/sdhci-esdhc-imx.c > > +++ b/drivers/mmc/host/sdhci-esdhc-imx.c > > @@ -870,6 +870,16 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) > > > > esdhc_clrset_le(host, mask, new_val, reg); > > return; > > + case SDHCI_TIMEOUT_CONTROL: > > + /* > > + * ESDHC_SYSTEM_CONTROL bit[23] used to control hardware reset > > + * pin of the card. Write 0 to bit[23] will reset the card. > > + * Only write DTOCV field here. > > + */ > > + esdhc_clrset_le(host, ESDHC_SYS_CTRL_DTOCV_MASK, > > + FIELD_PREP(ESDHC_SYS_CTRL_DTOCV_MASK, val), > > + ESDHC_SYSTEM_CONTROL); > > + return; > > case SDHCI_SOFTWARE_RESET: > > if (val & SDHCI_RESET_DATA) > > new_val = readl(host->ioaddr + SDHCI_HOST_CONTROL); > > @@ -1385,17 +1395,6 @@ static unsigned int esdhc_get_max_timeout_count(struct sdhci_host *host) > > return esdhc_is_usdhc(imx_data) ? 1 << 29 : 1 << 27; > > } > > > > -static void esdhc_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) > > -{ > > - struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > > - struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); > > - > > - /* use maximum timeout counter */ > > - esdhc_clrset_le(host, ESDHC_SYS_CTRL_DTOCV_MASK, > > - esdhc_is_usdhc(imx_data) ? 0xF0000 : 0xE0000, > > - ESDHC_SYSTEM_CONTROL); > > -} > > - > > static u32 esdhc_cqhci_irq(struct sdhci_host *host, u32 intmask) > > { > > int cmd_error = 0; > > @@ -1432,7 +1431,6 @@ static struct sdhci_ops sdhci_esdhc_ops = { > > .get_min_clock = esdhc_pltfm_get_min_clock, > > .get_max_timeout_count = esdhc_get_max_timeout_count, > > .get_ro = esdhc_pltfm_get_ro, > > - .set_timeout = esdhc_set_timeout, > > .set_bus_width = esdhc_pltfm_set_bus_width, > > .set_uhs_signaling = esdhc_set_uhs_signaling, > > .reset = esdhc_reset, > > @@ -1777,6 +1775,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) > > * to distinguish the card type. > > */ > > host->mmc_host_ops.init_card = usdhc_init_card; > > + > > + host->max_timeout_count = 0xF; > > } > > > > if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) >
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index ff78a7c6a04c..a34cabee5916 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -870,6 +870,16 @@ static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) esdhc_clrset_le(host, mask, new_val, reg); return; + case SDHCI_TIMEOUT_CONTROL: + /* + * ESDHC_SYSTEM_CONTROL bit[23] used to control hardware reset + * pin of the card. Write 0 to bit[23] will reset the card. + * Only write DTOCV field here. + */ + esdhc_clrset_le(host, ESDHC_SYS_CTRL_DTOCV_MASK, + FIELD_PREP(ESDHC_SYS_CTRL_DTOCV_MASK, val), + ESDHC_SYSTEM_CONTROL); + return; case SDHCI_SOFTWARE_RESET: if (val & SDHCI_RESET_DATA) new_val = readl(host->ioaddr + SDHCI_HOST_CONTROL); @@ -1385,17 +1395,6 @@ static unsigned int esdhc_get_max_timeout_count(struct sdhci_host *host) return esdhc_is_usdhc(imx_data) ? 1 << 29 : 1 << 27; } -static void esdhc_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) -{ - struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); - struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host); - - /* use maximum timeout counter */ - esdhc_clrset_le(host, ESDHC_SYS_CTRL_DTOCV_MASK, - esdhc_is_usdhc(imx_data) ? 0xF0000 : 0xE0000, - ESDHC_SYSTEM_CONTROL); -} - static u32 esdhc_cqhci_irq(struct sdhci_host *host, u32 intmask) { int cmd_error = 0; @@ -1432,7 +1431,6 @@ static struct sdhci_ops sdhci_esdhc_ops = { .get_min_clock = esdhc_pltfm_get_min_clock, .get_max_timeout_count = esdhc_get_max_timeout_count, .get_ro = esdhc_pltfm_get_ro, - .set_timeout = esdhc_set_timeout, .set_bus_width = esdhc_pltfm_set_bus_width, .set_uhs_signaling = esdhc_set_uhs_signaling, .reset = esdhc_reset, @@ -1777,6 +1775,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) * to distinguish the card type. */ host->mmc_host_ops.init_card = usdhc_init_card; + + host->max_timeout_count = 0xF; } if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING)