diff mbox series

[126/147] tcg: Include missing 'cpu.h' in translate-all.c

Message ID	20250422192819.302784-127-richard.henderson@linaro.org
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org> Subject: [PATCH 126/147] tcg: Include missing 'cpu.h' in translate-all.c Date: Tue, 22 Apr 2025 12:27:55 -0700 Message-ID: <20250422192819.302784-127-richard.henderson@linaro.org> In-Reply-To: <20250422192819.302784-1-richard.henderson@linaro.org> References: <20250422192819.302784-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org
Series	single-binary patch queue \| expand [000/147] single-binary patch queue [001/147] exec/tswap: target code can use TARGET_BIG_ENDIAN instead of target_words_bigendian() [002/147] exec/tswap: implement {ld, st}._p as functions instead of macros [003/147] exec/memory_ldst: extract memory_ldst declarations from cpu-all.h [004/147] exec/memory_ldst_phys: extract memory_ldst_phys declarations from cpu-all.h [005/147] exec/memory.h: make devend_memop "target defines" agnostic [006/147] codebase: prepare to remove cpu.h from exec/exec-all.h [007/147] exec/exec-all: remove dependency on cpu.h [008/147] exec/memory-internal: remove dependency on cpu.h [009/147] exec/ram_addr: remove dependency on cpu.h [010/147] system/kvm: make kvm_flush_coalesced_mmio_buffer() accessible for common code [011/147] exec/ram_addr: call xen_hvm_modified_memory only if xen is enabled [012/147] hw/xen: add stubs for various functions [013/147] system/xen: remove inline stubs [014/147] system/physmem: compilation unit is now common to all targets [015/147] include/exec/memory: extract devend_big_endian from devend_memop [016/147] include/exec/memory: move devend functions to memory-internal.h [017/147] system/memory: make compilation unit common [018/147] system/ioport: make compilation unit common [019/147] accel/tcg: Build user-exec-stub.c once [020/147] accel/tcg: Build plugin-gen.c once [021/147] accel/tcg: Fix cpu_ld_code_mmu for user mode [022/147] include/exec: Use vaddr for _mmu guest memory access routines [023/147] include/exec: Split out cpu-ldst-common.h [024/147] include/exec: Split out accel/tcg/cpu-mmu-index.h [025/147] include/exec: Inline _mmuidx_ra memory operations [026/147] include/exec: Inline _data_ra memory operations [027/147] include/exec: Inline _data memory operations [028/147] include/exec: Inline _code memory operations [029/147] accel/tcg: Perform aligned atomic reads in translator_ld [030/147] accel/tcg: Use cpu_ld_code_mmu in translator.c [031/147] accel/tcg: Implement translator_ld_end [032/147] accel/tcg: Remove mmap_lock/unlock from watchpoint.c [033/147] include/exec: Split out mmap-lock.h [034/147] include/system: Move exec/memory.h to system/memory.h [035/147] include/system: Move exec/address-spaces.h to system/address-spaces.h [036/147] include/system: Move exec/ioport.h to system/ioport.h [037/147] include/system: Move exec/ram_addr.h to system/ram_addr.h [038/147] include/system: Move exec/ramblock.h to system/ramblock.h [039/147] accel/tcg: Remove unnecesary inclusion of memory-internal.h in cputlb.c [040/147] exec: Restrict memory-internal.h to system/ [041/147] meson: Introduce top-level libuser_ss and libsystem_ss [042/147] gdbstub: Move syscalls.c out of common_ss [043/147] accel/tcg: Use libuser_ss and libsystem_ss [044/147] target/mips: Restrict semihosting tests to system mode [045/147] target/xtensa: Restrict semihosting tests to system mode [046/147] semihosting: Move user-only implementation out-of-line [047/147] semihosting: Assert is_user in user-only semihosting_enabled [048/147] include/exec: Split out watchpoint.h [049/147] hw/core: Move unconditional files to libsystem_ss, libuser_ss [050/147] system: Move most files to libsystem_ss [051/147] plugins: Move api.c, core.c to libuser_ss, libsystem_ss [052/147] include/exec: Drop ifndef CONFIG_USER_ONLY from cpu-common.h [053/147] include/hw/core: Drop ifndef CONFIG_USER_ONLY from cpu.h [054/147] include/hw/intc: Remove ifndef CONFIG_USER_ONLY from armv7m_nvic.h [055/147] include/hw/s390x: Remove ifndef CONFIG_USER_ONLY in css.h [056/147] include/exec: Split out icount.h [057/147] include/exec: Protect icount_enabled from poisoned symbols [058/147] include/system: Remove ifndef CONFIG_USER_ONLY in qtest.h [059/147] include/qemu: Remove ifndef CONFIG_USER_ONLY from accel.h [060/147] target/riscv: Remove ifndef CONFIG_USER_ONLY from cpu_cfg.h [061/147] meson: Only allow CONFIG_USER_ONLY from certain source sets [062/147] exec/cpu-all: extract tlb flags defines to exec/tlb-flags.h [063/147] accel/tcg: Fix argument types of tlb_reset_dirty [064/147] accel/tcg: Pass CPUTLBEntryFull to tlb_reset_dirty_range_locked [065/147] accel/tcg: Rebuild full flags in tlb_reset_dirty_range_locked [066/147] include/exec: Move TLB_MMIO, TLB_DISCARD_WRITE to slow flags [067/147] include/exec: Move tb_{, set_}page_addr[01] to translation-block.h [068/147] accel/tcg: Move get_page_addr_code declarations [069/147] accel/tcg: Remove page_protect [070/147] accel/tcg: Remove cpu-all.h, exec-all.h from tb-internal.h [071/147] target/rx: Fix copy/paste typo (riscv -> rx) [072/147] hw/core/cpu: Update CPUClass::mmu_index docstring [073/147] accel/tcg: Introduce TCGCPUOps::mmu_index() callback [074/147] target/alpha: Restrict SoftMMU mmu_index() to TCG [075/147] target/arm: Restrict SoftMMU mmu_index() to TCG [076/147] target/avr: Restrict SoftMMU mmu_index() to TCG [077/147] target/hppa: Restrict SoftMMU mmu_index() to TCG [078/147] target/i386: Remove unused cpu_(ldub, stb)_kernel macros [079/147] target/i386: Restrict cpu_mmu_index_kernel() to TCG [080/147] target/i386: Restrict SoftMMU mmu_index() to TCG [081/147] target/loongarch: Restrict SoftMMU mmu_index() to TCG [082/147] target/m68k: Restrict SoftMMU mmu_index() to TCG [083/147] target/microblaze: Restrict SoftMMU mmu_index() to TCG [084/147] target/mips: Restrict SoftMMU mmu_index() to TCG [085/147] target/openrisc: Restrict SoftMMU mmu_index() to TCG [086/147] target/ppc: Restrict SoftMMU mmu_index() to TCG [087/147] target/riscv: Restrict SoftMMU mmu_index() to TCG [088/147] target/rx: Restrict SoftMMU mmu_index() to TCG [089/147] target/s390x: Restrict SoftMMU mmu_index() to TCG [090/147] target/sh4: Restrict SoftMMU mmu_index() to TCG [091/147] target/sparc: Restrict SoftMMU mmu_index() to TCG [092/147] target/tricore: Restrict SoftMMU mmu_index() to TCG [093/147] target/xtensa: Restrict SoftMMU mmu_index() to TCG [094/147] target/hexagon: Implement TCGCPUOps.mmu_index [095/147] hw/core/cpu: Remove CPUClass::mmu_index() [096/147] accel/tcg: Build translator.c twice [097/147] accel/tcg: Split out tlb-bounds.h [098/147] include/exec: Redefine tlb-flags with absolute values [099/147] page-vary: Move and rename qemu_target_page_bits_min [100/147] page-vary: Restrict scope of TARGET_PAGE_BITS_MIN [101/147] exec/cpu-all: move cpu_copy to linux-user/qemu.h [102/147] include/exec/cpu-all: move compile time check for CPUArchState to cpu-target.c [103/147] exec/cpu-all: remove system/memory include [104/147] exec/cpu-all: remove exec/page-protection include [105/147] exec/cpu-all: remove tswap include [106/147] exec/cpu-all: remove exec/cpu-interrupt include [107/147] accel/tcg: fix missing includes for TCG_GUEST_DEFAULT_MO [108/147] accel/tcg: fix missing includes for TARGET_HAS_PRECISE_SMC [109/147] exec/cpu-all: remove cpu include [110/147] exec/cpu-all: remove exec/target_page include [111/147] exec/cpu-all: transfer exec/cpu-common include to cpu.h headers [112/147] exec/cpu-all: remove this header [113/147] accel/kvm: move KVM_HAVE_MCE_INJECTION define to kvm-all.c [114/147] exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned [115/147] target/arm/cpu: always define kvm related registers [116/147] target/arm/cpu: flags2 is always uint64_t [117/147] target/arm/cpu: define same set of registers for aarch32 and aarch64 [118/147] target/arm/cpu: remove inline stubs for aarch32 emulation [119/147] meson: add common hw files [120/147] hw/arm/boot: make compilation unit hw common [121/147] hw/arm/digic_boards: prepare compilation unit to be common [122/147] hw/arm/xlnx-zynqmp: prepare compilation unit to be common [123/147] hw/arm/xlnx-versal: prepare compilation unit to be common [124/147] hw/arm: make most of the compilation units common [125/147] target/riscv: Do not expose rv128 CPU on user mode emulation [126/147] tcg: Include missing 'cpu.h' in translate-all.c [127/147] tcg: Declare TARGET_INSN_START_EXTRA_WORDS in 'cpu-param.h' [128/147] tcg: Always define TARGET_INSN_START_EXTRA_WORDS [129/147] exec: Restrict 'cpu-ldst-common.h' to accel/tcg/ [130/147] exec: Restrict 'cpu_ldst.h' to accel/tcg/ [131/147] exec: Do not include 'accel/tcg/cpu-ldst.h' in 'exec-all.h' [132/147] tcg: Always define TCG_GUEST_DEFAULT_MO [133/147] tcg: Simplify tcg_req_mo() macro [134/147] tcg: Define guest_default_memory_order in TCGCPUOps [135/147] tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code() [136/147] tcg: Propagate CPUState argument to cpu_req_mo() [137/147] tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order [138/147] tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally [139/147] tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h' [140/147] tcg: Pass max_threads not max_cpus to tcg_init [141/147] tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h' [142/147] accel/tcg: Remove mttcg_enabled [143/147] tcg: Convert TCGState::mttcg_enabled to TriState [144/147] accel/tcg: Move mttcg warning to tcg_init_machine [145/147] target/riscv: Remove AccelCPUClass::cpu_class_init need [146/147] target/i386: Remove AccelCPUClass::cpu_class_init need [147/147] tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field

Commit Message

Richard Henderson April 22, 2025, 7:27 p.m. UTC

From: Philippe Mathieu-Daudé <philmd@linaro.org>

tb_check_watchpoint() calls cpu_get_tb_cpu_state(),
which is declared in each "cpu.h" header. It is indirectly
included via "tcg/insn-start-words.h". Since we want to
rework "tcg/insn-start-words.h", removing "cpu.h" in the
next commit, add the missing header now, otherwise we'd
get:

  accel/tcg/translate-all.c:598:9: error: call to undeclared function 'cpu_get_tb_cpu_state' [-Wimplicit-function-declaration]
  598 |         cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
      |         ^

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/translate-all.c | 1 +
 1 file changed, 1 insertion(+)

diff mbox series

Patch

diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index ed41fc5d0c..c5590eb695 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -69,6 +69,7 @@ 
 #include "internal-target.h"
 #include "tcg/perf.h"
 #include "tcg/insn-start-words.h"
+#include "cpu.h"
 
 TBContext tb_ctx;