| Message ID | 20250429092430.21477-4-quic_pkumpatl@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Enable audio on qcs6490-RB3Gen2 and qcm6490-idp boards | expand |
On 4/29/25 11:24 AM, Prasad Kumpatla wrote: > From: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > > Modify and enable WSA, VA, RX and TX lpass macros and lpass_tlmm clock > settings. For audioreach solution mclk, npl and fsgen clocks are enabled > through the q6prm clock driver. > > Signed-off-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> > Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> > Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> > --- > .../boot/dts/qcom/qcs6490-audioreach.dtsi | 48 +++++++++++++++++++ > 1 file changed, 48 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi > index b11b9eea64c1..f3859d805ea7 100644 > --- a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi > @@ -11,6 +11,54 @@ > #include <dt-bindings/sound/qcom,q6afe.h> > #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> > > +&lpass_rx_macro { > + /delete-property/ power-domains; > + /delete-property/ power-domain-names; > + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, TX -> RX? [...] > +&lpass_wsa_macro { > + /delete-property/ power-domains; > + /delete-property/ power-domain-names; > + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, TX -> WSA? Konrad
On 4/29/2025 4:24 PM, Konrad Dybcio wrote: > On 4/29/25 11:24 AM, Prasad Kumpatla wrote: >> From: Mohammad Rafi Shaik <quic_mohs@quicinc.com> >> >> Modify and enable WSA, VA, RX and TX lpass macros and lpass_tlmm clock >> settings. For audioreach solution mclk, npl and fsgen clocks are enabled >> through the q6prm clock driver. >> >> Signed-off-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> >> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> >> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> >> --- >> .../boot/dts/qcom/qcs6490-audioreach.dtsi | 48 +++++++++++++++++++ >> 1 file changed, 48 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi >> index b11b9eea64c1..f3859d805ea7 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi >> +++ b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi >> @@ -11,6 +11,54 @@ >> #include <dt-bindings/sound/qcom,q6afe.h> >> #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> >> >> +&lpass_rx_macro { >> + /delete-property/ power-domains; >> + /delete-property/ power-domain-names; >> + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >> + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > > TX -> RX? > > [...] > >> +&lpass_wsa_macro { >> + /delete-property/ power-domains; >> + /delete-property/ power-domain-names; >> + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >> + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, > > TX -> WSA? For qcs6490 RX drives clk from TX CORE which is mandated from DSP side, Unlike sm8450 dedicated core clocks. Core TX clk is used for both RX and WSA as per DSP recommendations. Thanks, Prasad> > Konrad
On 5/8/25 6:38 PM, Prasad Kumpatla wrote: > > > On 4/29/2025 4:24 PM, Konrad Dybcio wrote: >> On 4/29/25 11:24 AM, Prasad Kumpatla wrote: >>> From: Mohammad Rafi Shaik <quic_mohs@quicinc.com> >>> >>> Modify and enable WSA, VA, RX and TX lpass macros and lpass_tlmm clock >>> settings. For audioreach solution mclk, npl and fsgen clocks are enabled >>> through the q6prm clock driver. >>> >>> Signed-off-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com> >>> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> >>> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> >>> --- >>> .../boot/dts/qcom/qcs6490-audioreach.dtsi | 48 +++++++++++++++++++ >>> 1 file changed, 48 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi >>> index b11b9eea64c1..f3859d805ea7 100644 >>> --- a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi >>> @@ -11,6 +11,54 @@ >>> #include <dt-bindings/sound/qcom,q6afe.h> >>> #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> >>> +&lpass_rx_macro { >>> + /delete-property/ power-domains; >>> + /delete-property/ power-domain-names; >>> + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >>> + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >> >> TX -> RX? >> >> [...] >> >>> +&lpass_wsa_macro { >>> + /delete-property/ power-domains; >>> + /delete-property/ power-domain-names; >>> + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >>> + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >> >> TX -> WSA? > > For qcs6490 RX drives clk from TX CORE which is mandated from DSP side, Unlike sm8450 dedicated core clocks. Core TX clk is used for both RX and WSA as per DSP recommendations. Please leave a comment as it's not obvious Konrad
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi index b11b9eea64c1..f3859d805ea7 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs6490-audioreach.dtsi @@ -11,6 +11,54 @@ #include <dt-bindings/sound/qcom,q6afe.h> #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> +&lpass_rx_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; +}; + +&lpass_tlmm { + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; +}; + +&lpass_tx_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; +}; + +&lpass_va_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks = <&q6prmcc LPASS_CLK_ID_VA_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "mclk", "macro", "dcodec"; +}; + +&lpass_wsa_macro { + /delete-property/ power-domains; + /delete-property/ power-domain-names; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_va_macro>; + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; +}; + &remoteproc_adsp_glink { /delete-node/ apr;