Message ID | 20250429-ddr_stats_-v1-3-4fc818aab7bb@oss.qualcomm.com |
---|---|
State | New |
Headers | show |
Series | [1/3] soc: qcom: qcom_stats: Add support to read DDR statistic | expand |
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 54c6d0fdb2afa51084c510eddc341d6087189611..33574ad706b915136546c7f92c7cd0b8a0d62b7e 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3739,6 +3739,7 @@ aoss_qmp: power-management@c300000 { sram@c3f0000 { compatible = "qcom,rpmh-stats"; reg = <0 0x0c3f0000 0 0x400>; + qcom,qmp = <&aoss_qmp>; }; spmi_bus: spmi@c400000 { diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 82cabf777cd2c1dc87457aeede913873e7322ec2..e8371a90b9b98fbc12a429def8f6246c6418540a 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -3943,6 +3943,7 @@ aoss_qmp: power-management@c300000 { sram@c3f0000 { compatible = "qcom,rpmh-stats"; reg = <0 0x0c3f0000 0 0x400>; + qcom,qmp = <&aoss_qmp>; }; spmi_bus: spmi@c400000 { diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index c2937f7217943c4ca91a91eadc8259b2d6a01372..875b5a89d2555f258665c881ee3d96965b6d7a6a 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -5725,6 +5725,7 @@ aoss_qmp: power-management@c300000 { sram@c3f0000 { compatible = "qcom,rpmh-stats"; reg = <0 0x0c3f0000 0 0x400>; + qcom,qmp = <&aoss_qmp>; }; spmi_bus: spmi@c400000 { diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi index 149d2ed17641a085d510f3a8eab5a96304787f0c..4c54ed84e2d1ec836438448e2a02b6fe028f4c24 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -2490,6 +2490,7 @@ aoss_qmp: power-management@c300000 { sram@c3f0000 { compatible = "qcom,rpmh-stats"; reg = <0x0 0x0c3f0000 0x0 0x400>; + qcom,qmp = <&aoss_qmp>; }; spmi_bus: spmi@c400000 {
Add QMP handle which is used to send QMP command to always on processor to populate DDR stats. Add QMP handle for SM8450/SM8550/SM8650/SM8750. Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 + arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 + arch/arm64/boot/dts/qcom/sm8650.dtsi | 1 + arch/arm64/boot/dts/qcom/sm8750.dtsi | 1 + 4 files changed, 4 insertions(+)