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+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/spacemit,k1-dwc3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SpacemiT K1 SuperSpeed DWC3 USB SoC Controller
+
+maintainers:
+ - Ze Huang <huangze@whut.edu.cn>
+
+description: |
+ The SpacemiT K1 embeds a DWC3 USB IP Core which supports both Host and Device
+ functions for USB 3.0 and USB 2.0 standards.
+
+ Key features:
+ - USB3.0 SuperSpeed and USB2.0 High/Full/Low-Speed support
+ - Supports low-power modes (USB2.0 suspend, USB3.0 U1/U2/U3)
+ - Internal DMA controller and flexible endpoint FIFO sizing
+
+ Communication Interface:
+ - Use of PIPE3 (125MHz) interface for USB3.0 PHY
+ - Use of UTMI+ (30/60MHz) interface for USB2.0 PHY
+
+ The common content of the node is defined in snps,dwc3.yaml.
+
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - spacemit,k1-dwc3
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - spacemit,k1-dwc3
+ - const: snps,dwc3
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: bus_early
+
+ resets:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interconnects:
+ maxItems: 1
+ description:
+ On SpacemiT K1, USB performs DMA through bus other than parent DT node.
+ The 'interconnects' property explicitly describes this path, ensuring
+ correct address translation.
+
+ interconnect-names:
+ const: dma-mem
+
+ vbus-supply:
+ description: A phandle to the regulator supplying the VBUS voltage.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - interrupts
+ - interconnects
+ - interconnect-names
+
+additionalProperties: false
+
+examples:
+ - |
+ usb@c0a00000 {
+ compatible = "spacemit,k1-dwc3", "snps,dwc3";
+ reg = <0xc0a00000 0x10000>;
+ clocks = <&syscon_apmu 16>;
+ clock-names = "bus_early";
+ resets = <&syscon_apmu 8>;
+ interrupt-parent = <&plic>;
+ interrupts = <125>;
+ interconnects = <&dram_range0>;
+ interconnect-names = "dma-mem";
+ };
Add support for the USB 3.0 Dual-Role Device (DRD) controller embedded in the SpacemiT K1 SoC. The controller is based on the Synopsys DesignWare Core USB 3 (DWC3) IP, supporting both Host and Device modes for USB 3.0 and USB 2.0 standards. Signed-off-by: Ze Huang <huangze@whut.edu.cn> --- .../devicetree/bindings/usb/spacemit,k1-dwc3.yaml | 95 ++++++++++++++++++++++ 1 file changed, 95 insertions(+)