[PULL,16/59] accel/tcg: Compile tb-maint.c twice

Message ID	20250501212113.2961531-17-richard.henderson@linaro.org
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Cc: Anton Johansson <anjo@rev.ng>, Pierrick Bouvier <pierrick.bouvier@linaro.org>, =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= <philmd@linaro.org> Subject: [PULL 16/59] accel/tcg: Compile tb-maint.c twice Date: Thu, 1 May 2025 14:20:30 -0700 Message-ID: <20250501212113.2961531-17-richard.henderson@linaro.org> In-Reply-To: <20250501212113.2961531-1-richard.henderson@linaro.org> References: <20250501212113.2961531-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org
Series	[PULL,01/59] accel/tcg: Add CPUState argument to page_unprotect \| expand [PULL,01/59] accel/tcg: Add CPUState argument to page_unprotect [PULL,02/59] accel/tcg: Add CPUState argument to tb_invalidate_phys_page_unwind [PULL,03/59] accel/tcg: Add CPUState arg to tb_invalidate_phys_page_range__locked [PULL,04/59] accel/tcg: Merge tb_invalidate_phys_range{__locked} [PULL,05/59] accel/tcg: Add CPUState arg to tb_invalidate_phys_range [PULL,06/59] accel/tcg: Add CPUState arg to tb_invalidate_phys_range_fast [PULL,07/59] accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc [PULL,08/59] accel/tcg: Simplify CPU_TLB_DYN_MAX_BITS [PULL,09/59] accel/tcg: Simplify L1_MAP_ADDR_SPACE_BITS [PULL,10/59] accel/tcg: Merge internal-target.h into internal-common.h [PULL,11/59] accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target [PULL,12/59] accel/tcg: Use vaddr for walk_memory_regions callback [PULL,13/59] accel/tcg: Use vaddr in user/page-protection.h [PULL,14/59] include/exec: Include missing headers in exec-all.h [PULL,15/59] include/exec: Move tb_invalidate_phys_range to translation-block.h [PULL,16/59] accel/tcg: Compile tb-maint.c twice [PULL,17/59] accel/tcg: Remove #error for non-tcg in getpc.h [PULL,18/59] target/riscv: Include missing 'accel/tcg/getpc.h' in csr.c [PULL,19/59] accel/tcg: Include 'accel/tcg/getpc.h' in 'exec/helper-proto' [PULL,20/59] physmem: Move TCG IOTLB methods around [PULL,21/59] physmem: Restrict TCG IOTLB code to TCG accel [PULL,22/59] accel/tcg: Extract probe API out of 'exec/exec-all.h' [PULL,23/59] include: Remove 'exec/exec-all.h' [PULL,24/59] accel/tcg: Generalize fake_user_interrupt test [PULL,25/59] accel/tcg: Unconditionally use CPU_DUMP_CCOP in log_cpu_exec [PULL,26/59] accel/tcg: Introduce TCGCPUOps.cpu_exec_reset [PULL,27/59] target/i386: Split out x86_cpu_exec_reset [PULL,28/59] accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h [PULL,29/59] target/arm: Move cpu_get_tb_cpu_state to hflags.c [PULL,30/59] target/arm: Unexport assert_hflags_rebuild_correctly [PULL,31/59] target/riscv: Move cpu_get_tb_cpu_state to tcg-cpu.c [PULL,32/59] accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state [PULL,33/59] accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps [PULL,34/59] accel/tcg: Pass TCGTBCPUState to tb_lookup [PULL,35/59] accel/tcg: Pass TCGTBCPUState to tb_htable_lookup [PULL,36/59] accel/tcg: Use TCGTBCPUState in struct tb_desc [PULL,37/59] accel/tcg: Pass TCGTBCPUState to tb_gen_code [PULL,38/59] accel/tcg: Split out accel/tcg/helper-retaddr.h [PULL,39/59] accel/tcg: Compile cpu-exec.c twice [PULL,40/59] system/vl: Filter machine list available for a particular target binary [PULL,41/59] qemu/target_info: Add %target_cpu_type field to TargetInfo [PULL,42/59] qemu: Introduce target_long_bits() [PULL,43/59] tcg: Define INSN_START_WORDS as constant 3 [PULL,44/59] accel/tcg: Don't use TARGET_LONG_BITS in decode_sleb128 [PULL,45/59] accel/tcg: Use target_long_bits() in translate-all.c [PULL,46/59] accel/tcg: Build translate-all.c twice [PULL,47/59] accel/tcg: Build tcg-all.c twice [PULL,48/59] accel/tcg: Use vaddr in cpu_loop.h [PULL,49/59] accel/tcg: Move user-only tlb_vaddr_to_host out of line [PULL,50/59] accel/tcg: Move tlb_vaddr_to_host declaration to probe.h [PULL,51/59] accel/tcg: Use target_long_bits() in cputlb.c [PULL,52/59] accel/tcg: Use vaddr for plugin_{load,store}_cb [PULL,53/59] accel/tcg: Build cputlb.c once [PULL,54/59] include/user: Convert GUEST_ADDR_MAX to a variable [PULL,55/59] include/user: Use vaddr in guest-host.h [PULL,56/59] accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr [PULL,57/59] accel/tcg: Remove TARGET_PAGE_DATA_SIZE [PULL,58/59] accel/tcg: Avoid abi_ptr in user-exec.c [PULL,59/59] accel/tcg: Build user-exec.c once

Message ID

20250501212113.2961531-17-richard.henderson@linaro.org

State

New

Headers

Received-SPF: pass (google.com: domain of
 qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as
 permitted sender) client-ip=209.51.188.17;
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Anton Johansson <anjo@rev.ng>,
 Pierrick Bouvier <pierrick.bouvier@linaro.org>, =?utf-8?q?Philippe_Mathieu-?=
	=?utf-8?q?Daud=C3=A9?= <philmd@linaro.org>
Subject: [PULL 16/59] accel/tcg: Compile tb-maint.c twice
Date: Thu,  1 May 2025 14:20:30 -0700
Message-ID: <20250501212113.2961531-17-richard.henderson@linaro.org>
In-Reply-To: <20250501212113.2961531-1-richard.henderson@linaro.org>
References: <20250501212113.2961531-1-richard.henderson@linaro.org>
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Received-SPF: pass client-ip=2607:f8b0:4864:20::62c;
 envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com
X-Spam_score_int: -20
X-Spam_score: -2.1
X-Spam_bar: --
X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,
 DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,
 RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,
 SPF_PASS=-0.001 autolearn=ham autolearn_force=no
X-Spam_action: no action
X-BeenThere: qemu-devel@nongnu.org
X-Mailman-Version: 2.1.29
Precedence: list
List-Id: <qemu-devel.nongnu.org>
List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>,
 <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>,
 <mailto:qemu-devel-request@nongnu.org?subject=subscribe>
Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org
Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org

Series

[PULL,01/59] accel/tcg: Add CPUState argument to page_unprotect | expand

Commit Message

Richard Henderson May 1, 2025, 9:20 p.m. UTC

Reviewed-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/tb-hash.h   | 3 +--
 accel/tcg/tb-maint.c  | 2 --
 accel/tcg/meson.build | 2 +-
 3 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/accel/tcg/tb-hash.h b/accel/tcg/tb-hash.h
index 3bc5042d9d..f7b159f04c 100644
--- a/accel/tcg/tb-hash.h
+++ b/accel/tcg/tb-hash.h
@@ -20,8 +20,7 @@ 
 #ifndef EXEC_TB_HASH_H
 #define EXEC_TB_HASH_H
 
-#include "exec/cpu-defs.h"
-#include "exec/exec-all.h"
+#include "exec/vaddr.h"
 #include "exec/target_page.h"
 #include "exec/translation-block.h"
 #include "qemu/xxhash.h"
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index b144fcd4a0..0048316f99 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -20,10 +20,8 @@ 
 #include "qemu/osdep.h"
 #include "qemu/interval-tree.h"
 #include "qemu/qtree.h"
-#include "cpu.h"
 #include "exec/cputlb.h"
 #include "exec/log.h"
-#include "exec/exec-all.h"
 #include "exec/page-protection.h"
 #include "exec/mmap-lock.h"
 #include "exec/tb-flush.h"
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
index 047afa49a2..3f7b127130 100644
--- a/accel/tcg/meson.build
+++ b/accel/tcg/meson.build
@@ -8,6 +8,7 @@  tcg_ss.add(files(
   'cpu-exec-common.c',
   'tcg-runtime.c',
   'tcg-runtime-gvec.c',
+  'tb-maint.c',
   'translator.c',
 ))
 if get_option('plugins')
@@ -21,7 +22,6 @@  tcg_specific_ss = ss.source_set()
 tcg_specific_ss.add(files(
   'tcg-all.c',
   'cpu-exec.c',
-  'tb-maint.c',
   'translate-all.c',
 ))
 tcg_specific_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))

[PULL,16/59] accel/tcg: Compile tb-maint.c twice

Commit Message

Patch