diff mbox series

[v5,1/8] dt-bindings: serial: describe SA8255p

Message ID 20250506180232.1299-2-quic_ptalari@quicinc.com
State New
Headers show
Series Enable QUPs and Serial on SA8255p Qualcomm platforms | expand

Commit Message

Praveen Talari May 6, 2025, 6:02 p.m. UTC 
From: Nikunj Kela <quic_nkela@quicinc.com>

SA8255p platform abstracts resources such as clocks, interconnect and
GPIO pins configuration in Firmware. SCMI power and perf protocols are
used to send request for resource configurations.

Add DT bindings for the QUP GENI UART controller on sa8255p platform.

Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
Co-developed-by: Praveen Talari <quic_ptalari@quicinc.com>
Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com>
---
v4 -> v5
- added wake irq in example node

v3 -> v4
- added version log after ---

v2 -> v3
- dropped description for interrupt-names
- rebased reg property order in required option

v1 -> v2
- reorder sequence of tags in commit text
- moved reg property after compatible field
- added interrupt-names property
---
 .../serial/qcom,sa8255p-geni-uart.yaml        | 66 +++++++++++++++++++
 1 file changed, 66 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml

Comments

Krzysztof Kozlowski May 6, 2025, 6:23 p.m. UTC | #1 
On 06/05/2025 20:02, Praveen Talari wrote:
> +
> +properties:
> +  compatible:
> +    enum:
> +      - qcom,sa8255p-geni-uart
> +      - qcom,sa8255p-geni-debug-uart
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    minItems: 1

Nothing changed here, this should be dropped based on previous discussion.

You sent this v5 on 8:02 PM of my time. *THEN* you responded to my
comment at v4 at 8:05 PM. That's the way to waste everyone's time.

I do not understand why interrupt is optional for a new, complete device
description.

Best regards,
Krzysztof
Praveen Talari May 8, 2025, 5:45 a.m. UTC | #2 
Hi Krzysztof

Thank you for your patience. I consider your inputs as valuable learning.

On 5/6/2025 11:53 PM, Krzysztof Kozlowski wrote:
> On 06/05/2025 20:02, Praveen Talari wrote:
>> +
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - qcom,sa8255p-geni-uart
>> +      - qcom,sa8255p-geni-debug-uart
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  interrupts:
>> +    minItems: 1
> Nothing changed here, this should be dropped based on previous discussion.
>
> You sent this v5 on 8:02 PM of my time. *THEN* you responded to my
> comment at v4 at 8:05 PM. That's the way to waste everyone's time.
>
> I do not understand why interrupt is optional for a new, complete device
> description.

On this platform, there is no use case of waking up UART, so we consider 
the  wake up IRQ as optional.

Thanks,

Praveen

>
> Best regards,
> Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
new file mode 100644
index 000000000000..c939ddb4d253
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml
@@ -0,0 +1,66 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Geni based QUP UART interface
+
+maintainers:
+  - Praveen Talari <quic_ptalari@quicinc.com>
+
+allOf:
+  - $ref: /schemas/serial/serial.yaml#
+
+properties:
+  compatible:
+    enum:
+      - qcom,sa8255p-geni-uart
+      - qcom,sa8255p-geni-debug-uart
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    minItems: 1
+    items:
+      - description: UART core irq
+      - description: Wakeup irq (RX GPIO)
+
+  interrupt-names:
+    items:
+      - const: uart
+      - const: wakeup
+
+  power-domains:
+    minItems: 2
+    maxItems: 2
+
+  power-domain-names:
+    items:
+      - const: power
+      - const: perf
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - power-domains
+  - power-domain-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    serial@990000 {
+        compatible = "qcom,sa8255p-geni-uart";
+        reg = <0x990000 0x4000>;
+        interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>,
+                     <&tlmm 35 IRQ_TYPE_LEVEL_HIGH>;
+        interrupt-names = "uart", "wakeup";
+        power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>;
+        power-domain-names = "power", "perf";
+    };
+...