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From: Wasim Nazir <quic_wasimn@quicinc.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
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Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
kernel@quicinc.com, kernel@oss.qualcomm.com,
Wasim Nazir <quic_wasimn@quicinc.com>
Subject: [PATCH 7/8] dt-bindings: arm: qcom: Add bindings for QCS9100M SOM
Date: Wed, 7 May 2025 12:21:15 +0530
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| Series |
qcom: Refactor sa8775p/qcs9100 based ride boards
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expand
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diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 671f2d571260..514ed617565b 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -964,6 +964,7 @@ properties: - items: - enum: - qcom,qcs9100-ride-r3 + - const: qcom,qcs9100-som - const: qcom,qcs9100 - const: qcom,sa8775p
QCS9100 SOC is compatible Industrial-IOT grade variant of SA8775p SOC. Add devicetree bindings for QCS9100M SOM which is based on qcs9100 SOC. QCS9100M SOM have qcs9100 SOC, PMICs and DDR along with memory-map updates and it is stacked on ride-r3 board. Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.49.0