| Message ID | 20250604080237.494014-2-quic_wenbyao@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: qcom: x1e80100-qcp: Add power supply and sideband signals for PCIe RC | expand |
On Wed, Jun 04, 2025 at 04:02:33PM +0800, Wenbin Yao wrote: > From: Qiang Yu <qiang.yu@oss.qualcomm.com> > > Enable the pwrctrl driver, which is utilized to manage the power supplies > of the devices connected to the PCI slots. This ensures that the voltage > rails of the standard PCI slots on some platforms eg. X1E80100-QCP can be > correctly turned on/off if they are described under PCIe port device tree > node. > > Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com> > Signed-off-by: Wenbin Yao <quic_wenbyao@quicinc.com> > --- > arch/arm64/Kconfig.platforms | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms > index a541bb029..0ffd65e36 100644 > --- a/arch/arm64/Kconfig.platforms > +++ b/arch/arm64/Kconfig.platforms > @@ -270,6 +270,7 @@ config ARCH_QCOM > select GPIOLIB > select PINCTRL > select HAVE_PWRCTRL if PCI > + select PCI_PWRCTRL_SLOT if PCI PWRCTL isn't a fundamental feature of ARCH_QCOM, so why do we select it here? Regards, Bjorn > help > This enables support for the ARMv8 based Qualcomm chipsets. > > -- > 2.34.1 >
On Wed, Jun 04, 2025 at 03:30:22PM -0500, Bjorn Andersson wrote: > On Wed, Jun 04, 2025 at 04:02:33PM +0800, Wenbin Yao wrote: > > From: Qiang Yu <qiang.yu@oss.qualcomm.com> > > > > Enable the pwrctrl driver, which is utilized to manage the power supplies > > of the devices connected to the PCI slots. This ensures that the voltage > > rails of the standard PCI slots on some platforms eg. X1E80100-QCP can be > > correctly turned on/off if they are described under PCIe port device tree > > node. > > > > Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com> > > Signed-off-by: Wenbin Yao <quic_wenbyao@quicinc.com> > > --- > > arch/arm64/Kconfig.platforms | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms > > index a541bb029..0ffd65e36 100644 > > --- a/arch/arm64/Kconfig.platforms > > +++ b/arch/arm64/Kconfig.platforms > > @@ -270,6 +270,7 @@ config ARCH_QCOM > > select GPIOLIB > > select PINCTRL > > select HAVE_PWRCTRL if PCI > > + select PCI_PWRCTRL_SLOT if PCI > > PWRCTL isn't a fundamental feature of ARCH_QCOM, so why do we select it > here? > We were asked to select it in the same way as PCI_PWRCTL_PWRSEQ, following an approach like: select PCI_PWRCTL_SLOT if ARCH_QCOM in Kconfig and nothing in defconfig. But to be honest, we didn't figure out a more appropriate way. Unlike PCI_PWRCTL_PWRSEQ, which is selected by ath11k/ath12k, PCI_PWRCTL_SLOT doesn't have a specific endpoint device driver to select it. Would it be appropriate to add "select PCI_PWRCTL_SLOT if HAVE_PWRCTL" in the Kconfig for portdrv? Do you have any recommendations? > Regards, > Bjorn > > > help > > This enables support for the ARMv8 based Qualcomm chipsets. > > > > -- > > 2.34.1 > >
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index a541bb029..0ffd65e36 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -270,6 +270,7 @@ config ARCH_QCOM select GPIOLIB select PINCTRL select HAVE_PWRCTRL if PCI + select PCI_PWRCTRL_SLOT if PCI help This enables support for the ARMv8 based Qualcomm chipsets.