| Message ID | 20250606172114.6618-2-quic_ptalari@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | Enable QUPs and Serial on SA8255p Qualcomm platforms | expand |
On Fri, Jun 06, 2025 at 10:51:07PM GMT, Praveen Talari wrote: > From: Nikunj Kela <quic_nkela@quicinc.com> > > SA8255p platform abstracts resources such as clocks, interconnect and > GPIO pins configuration in Firmware. SCMI power and perf protocols are > used to send request for resource configurations. > > Add DT bindings for the QUP GENI UART controller on sa8255p platform. > > The wakeup interrupt (IRQ) is treated as optional, as not all UART > instances have a wakeup-capable interrupt routed via the PDC. > > Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> > Co-developed-by: Praveen Talari <quic_ptalari@quicinc.com> > Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com> > --- > v5 -> v6 > - added description for interrupt-names > - added wakeup irq as optional information in commit text and > property description. > - removed wake irq form example node. > > v4 -> v5 > - added wake irq in example node > > v3 -> v4 > - added version log after --- > > v2 -> v3 > - dropped description for interrupt-names > - rebased reg property order in required option > > v1 -> v2 > - reorder sequence of tags in commit text > - moved reg property after compatible field > - added interrupt-names property > --- > .../serial/qcom,sa8255p-geni-uart.yaml | 68 +++++++++++++++++++ > 1 file changed, 68 insertions(+) > create mode 100644 Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml > > diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml > new file mode 100644 > index 000000000000..c2e11ddcc0f6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml > @@ -0,0 +1,68 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Geni based QUP UART interface > + > +maintainers: > + - Praveen Talari <quic_ptalari@quicinc.com> > + > +allOf: > + - $ref: /schemas/serial/serial.yaml# > + > +properties: > + compatible: > + enum: > + - qcom,sa8255p-geni-uart > + - qcom,sa8255p-geni-debug-uart > + > + reg: > + maxItems: 1 > + > + interrupts: > + minItems: 1 Drop, this is not in sync with interrupt-names. You already received comments on this. We talk about this since v4! I am not reviewing the rest. Implement complete feedback given to you in v4 and v5. Best regards, Krzysztof
Hi Krzysztof Thank you for review. On 6/10/2025 12:34 PM, Krzysztof Kozlowski wrote: > On Fri, Jun 06, 2025 at 10:51:07PM GMT, Praveen Talari wrote: >> From: Nikunj Kela <quic_nkela@quicinc.com> >> >> SA8255p platform abstracts resources such as clocks, interconnect and >> GPIO pins configuration in Firmware. SCMI power and perf protocols are >> used to send request for resource configurations. >> >> Add DT bindings for the QUP GENI UART controller on sa8255p platform. >> >> The wakeup interrupt (IRQ) is treated as optional, as not all UART >> instances have a wakeup-capable interrupt routed via the PDC. >> >> Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> >> Co-developed-by: Praveen Talari <quic_ptalari@quicinc.com> >> Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com> >> --- >> v5 -> v6 >> - added description for interrupt-names >> - added wakeup irq as optional information in commit text and >> property description. >> - removed wake irq form example node. >> >> v4 -> v5 >> - added wake irq in example node >> >> v3 -> v4 >> - added version log after --- >> >> v2 -> v3 >> - dropped description for interrupt-names >> - rebased reg property order in required option >> >> v1 -> v2 >> - reorder sequence of tags in commit text >> - moved reg property after compatible field >> - added interrupt-names property >> --- >> .../serial/qcom,sa8255p-geni-uart.yaml | 68 +++++++++++++++++++ >> 1 file changed, 68 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml >> >> diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml >> new file mode 100644 >> index 000000000000..c2e11ddcc0f6 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml >> @@ -0,0 +1,68 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Geni based QUP UART interface >> + >> +maintainers: >> + - Praveen Talari <quic_ptalari@quicinc.com> >> + >> +allOf: >> + - $ref: /schemas/serial/serial.yaml# >> + >> +properties: >> + compatible: >> + enum: >> + - qcom,sa8255p-geni-uart >> + - qcom,sa8255p-geni-debug-uart >> + >> + reg: >> + maxItems: 1 >> + >> + interrupts: >> + minItems: 1 > > Drop, this is not in sync with interrupt-names. You already received > comments on this. We talk about this since v4! I hope you have reviewed the commit message and the description under interrupt-name regarding the optional wakeup IRQ. I believe that address your query. I can include minItems:1 in the interrupt-name property in the next patch set to align/sync with interrupts property. Thanks, Praveen Talari > > I am not reviewing the rest. Implement complete feedback given to you in > v4 and v5. > > Best regards, > Krzysztof >
On 10/06/2025 10:10, Praveen Talari wrote: >>> + >>> + interrupts: >>> + minItems: 1 >> >> Drop, this is not in sync with interrupt-names. You already received >> comments on this. We talk about this since v4! > I hope you have reviewed the commit message and the description under > interrupt-name regarding the optional wakeup IRQ. I believe that address > your query. > > I can include minItems:1 in the interrupt-name property in the next > patch set to align/sync with interrupts property. Yes, then the interrupt-names needs minItems. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml new file mode 100644 index 000000000000..c2e11ddcc0f6 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Geni based QUP UART interface + +maintainers: + - Praveen Talari <quic_ptalari@quicinc.com> + +allOf: + - $ref: /schemas/serial/serial.yaml# + +properties: + compatible: + enum: + - qcom,sa8255p-geni-uart + - qcom,sa8255p-geni-debug-uart + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + items: + - description: UART core irq + - description: Wakeup irq (RX GPIO) + + interrupt-names: + description: + The UART interrupt and optionally the RX in-band wakeup interrupt + as not all UART instances have a wakeup-capable interrupt routed + via the PDC. + items: + - const: uart + - const: wakeup + + power-domains: + minItems: 2 + maxItems: 2 + + power-domain-names: + items: + - const: power + - const: perf + +required: + - compatible + - reg + - interrupts + - power-domains + - power-domain-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + serial@990000 { + compatible = "qcom,sa8255p-geni-uart"; + reg = <0x990000 0x4000>; + interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>; + power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>; + power-domain-names = "power", "perf"; + }; +...