@@ -5015,6 +5015,93 @@ ath12k_htt_print_rx_pdev_rate_ext_stats_tlv(const void *tag_buf, u16 tag_len,
stats_req->buf_len = len;
}
+static void
+ath12k_htt_print_pdev_tdma_stats_tlv(const void *tag_buf, u16 tag_len,
+ struct debug_htt_stats_req *stats_req)
+{
+ const struct ath12k_htt_pdev_tdma_stats_tlv *htt_stats_buf = tag_buf;
+ u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
+ u32 len = stats_req->buf_len;
+ u8 *buf = stats_req->buf;
+ u32 mac_id_word;
+
+ if (tag_len < sizeof(*htt_stats_buf))
+ return;
+
+ mac_id_word = le32_to_cpu(htt_stats_buf->mac_id__word);
+
+ len += scnprintf(buf + len, buf_len - len, "HTT_PDEV_TDMA_STATS_TLV:\n");
+ len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",
+ u32_get_bits(mac_id_word, ATH12K_HTT_STATS_MAC_ID));
+ len += scnprintf(buf + len, buf_len - len, "num_tdma_active_schedules = %u\n",
+ le32_to_cpu(htt_stats_buf->num_tdma_active_schedules));
+ len += scnprintf(buf + len, buf_len - len, "num_tdma_reserved_schedules = %u\n",
+ le32_to_cpu(htt_stats_buf->num_tdma_reserved_schedules));
+ len += scnprintf(buf + len, buf_len - len,
+ "num_tdma_restricted_schedules = %u\n",
+ le32_to_cpu(htt_stats_buf->num_tdma_restricted_schedules));
+ len += scnprintf(buf + len, buf_len - len,
+ "num_tdma_unconfigured_schedules = %u\n",
+ le32_to_cpu(htt_stats_buf->num_tdma_unconfigured_schedules));
+ len += scnprintf(buf + len, buf_len - len, "num_tdma_slot_switches = %u\n",
+ le32_to_cpu(htt_stats_buf->num_tdma_slot_switches));
+ len += scnprintf(buf + len, buf_len - len, "num_tdma_edca_switches = %u\n\n",
+ le32_to_cpu(htt_stats_buf->num_tdma_edca_switches));
+
+ stats_req->buf_len = len;
+}
+
+static void
+ath12k_htt_print_mlo_sched_stats_tlv(const void *tag_buf, u16 tag_len,
+ struct debug_htt_stats_req *stats_req)
+{
+ const struct ath12k_htt_mlo_sched_stats_tlv *stats_buf = tag_buf;
+ u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
+ u32 len = stats_req->buf_len;
+ u8 *buf = stats_req->buf;
+
+ if (tag_len < sizeof(*stats_buf))
+ return;
+
+ len += scnprintf(buf + len, buf_len - len, "HTT_STATS_MLO_SCHED_STATS:\n");
+ len += scnprintf(buf + len, buf_len - len, "num_sec_link_sched = %u\n",
+ le32_to_cpu(stats_buf->pref_link_num_sec_link_sched));
+ len += scnprintf(buf + len, buf_len - len, "num_pref_link_timeout = %u\n",
+ le32_to_cpu(stats_buf->pref_link_num_pref_link_timeout));
+ len += scnprintf(buf + len, buf_len - len, "num_pref_link_sch_delay_ipc = %u\n",
+ le32_to_cpu(stats_buf->pref_link_num_pref_link_sch_delay_ipc));
+ len += scnprintf(buf + len, buf_len - len, "num_pref_link_timeout_ipc = %u\n\n",
+ le32_to_cpu(stats_buf->pref_link_num_pref_link_timeout_ipc));
+
+ stats_req->buf_len = len;
+}
+
+static void
+ath12k_htt_print_mlo_ipc_stats_tlv(const void *tag_buf, u16 tag_len,
+ struct debug_htt_stats_req *stats_req)
+{
+ const struct ath12k_htt_pdev_mlo_ipc_stats_tlv *stats_buf = tag_buf;
+ u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
+ u32 len = stats_req->buf_len;
+ u8 *buf = stats_req->buf;
+ u8 i, j;
+
+ if (tag_len < sizeof(*stats_buf))
+ return;
+
+ len += scnprintf(buf + len, buf_len - len, "HTT_STATS_MLO_IPC_STATS:\n");
+ for (i = 0; i < ATH12K_HTT_HWMLO_MAX_LINKS; i++) {
+ len += scnprintf(buf + len, buf_len - len, "src_link: %u\n", i);
+ for (j = 0; j < ATH12K_HTT_MLO_MAX_IPC_RINGS; j++)
+ len += scnprintf(buf + len, buf_len - len,
+ "mlo_ipc_ring_full_cnt[%u]: %u\n", j,
+ le32_to_cpu(stats_buf->mlo_ipc_ring_cnt[i][j]));
+ len += scnprintf(buf + len, buf_len - len, "\n");
+ }
+
+ stats_req->buf_len = len;
+}
+
static int ath12k_dbg_htt_ext_stats_parse(struct ath12k_base *ab,
u16 tag, u16 len, const void *tag_buf,
void *user_data)
@@ -5283,6 +5370,15 @@ static int ath12k_dbg_htt_ext_stats_parse(struct ath12k_base *ab,
case HTT_STATS_RX_PDEV_RATE_EXT_STATS_TAG:
ath12k_htt_print_rx_pdev_rate_ext_stats_tlv(tag_buf, len, stats_req);
break;
+ case HTT_STATS_PDEV_TDMA_TAG:
+ ath12k_htt_print_pdev_tdma_stats_tlv(tag_buf, len, stats_req);
+ break;
+ case HTT_STATS_MLO_SCHED_STATS_TAG:
+ ath12k_htt_print_mlo_sched_stats_tlv(tag_buf, len, stats_req);
+ break;
+ case HTT_STATS_PDEV_MLO_IPC_STATS_TAG:
+ ath12k_htt_print_mlo_ipc_stats_tlv(tag_buf, len, stats_req);
+ break;
default:
break;
}
@@ -155,6 +155,9 @@ enum ath12k_dbg_htt_ext_stats_type {
ATH12K_DBG_HTT_EXT_STATS_PDEV_SCHED_ALGO = 49,
ATH12K_DBG_HTT_EXT_STATS_MANDATORY_MUOFDMA = 51,
ATH12K_DGB_HTT_EXT_STATS_PDEV_MBSSID_CTRL_FRAME = 54,
+ ATH12K_DBG_HTT_PDEV_TDMA_STATS = 57,
+ ATH12K_DBG_HTT_MLO_SCHED_STATS = 63,
+ ATH12K_DBG_HTT_PDEV_MLO_IPC_STATS = 64,
/* keep this last */
ATH12K_DBG_HTT_NUM_EXT_STATS,
@@ -247,6 +250,9 @@ enum ath12k_dbg_htt_tlv_tag {
HTT_STATS_PDEV_SCHED_ALGO_OFDMA_STATS_TAG = 165,
HTT_STATS_TXBF_OFDMA_AX_STEER_MPDU_STATS_TAG = 172,
HTT_STATS_PDEV_MBSSID_CTRL_FRAME_STATS_TAG = 176,
+ HTT_STATS_PDEV_TDMA_TAG = 187,
+ HTT_STATS_MLO_SCHED_STATS_TAG = 190,
+ HTT_STATS_PDEV_MLO_IPC_STATS_TAG = 191,
HTT_STATS_MAX_TAG,
};
@@ -1872,4 +1878,28 @@ struct ath12k_htt_pdev_mbssid_ctrl_frame_tlv {
__le32 ul_mumimo_trigger_within_bss;
} __packed;
+struct ath12k_htt_pdev_tdma_stats_tlv {
+ __le32 mac_id__word;
+ __le32 num_tdma_active_schedules;
+ __le32 num_tdma_reserved_schedules;
+ __le32 num_tdma_restricted_schedules;
+ __le32 num_tdma_unconfigured_schedules;
+ __le32 num_tdma_slot_switches;
+ __le32 num_tdma_edca_switches;
+} __packed;
+
+struct ath12k_htt_mlo_sched_stats_tlv {
+ __le32 pref_link_num_sec_link_sched;
+ __le32 pref_link_num_pref_link_timeout;
+ __le32 pref_link_num_pref_link_sch_delay_ipc;
+ __le32 pref_link_num_pref_link_timeout_ipc;
+} __packed;
+
+#define ATH12K_HTT_HWMLO_MAX_LINKS 6
+#define ATH12K_HTT_MLO_MAX_IPC_RINGS 7
+
+struct ath12k_htt_pdev_mlo_ipc_stats_tlv {
+ __le32 mlo_ipc_ring_cnt[ATH12K_HTT_HWMLO_MAX_LINKS][ATH12K_HTT_MLO_MAX_IPC_RINGS];
+} __packed;
+
#endif