@@ -65,10 +65,45 @@ properties:
- const: core
iommus:
+ minItems: 1
maxItems: 2
dma-coherent: true
+ resv_region:
+ type: object
+ additionalProperties: false
+
+ description:
+ Reserve region specifies regions which should be excluded from IOVA.
+
+ properties:
+ iommu-addresses:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - iommu-addresses
+
+ non_pixel:
+ type: object
+ additionalProperties: false
+
+ description:
+ Non pixel context bank is needed when video hardware have distinct iommus
+ for non pixel buffers.
+
+ properties:
+ iommus:
+ maxItems: 1
+
+ memory-region:
+ maxItems: 1
+
+ required:
+ - iommus
+ - memory-region
+
operating-points-v2: true
opp-table:
Existing definition limits the IOVA to an addressable range of 4GiB, and even within that range, some of the space is used by IO registers, thereby limiting the available IOVA to even lesser. Video hardware is designed to emit different stream-ID for pixel and non_pixel buffers, thereby introduce a non_pixel sub node to handle non_pixel stream-ID. With this, both iris and non_pixel device can have IOVA range of 0-4GiB individually. Certain video usecases like higher video concurrency needs IOVA higher than 4GiB. Add the "resv_region" property, which defines reserved IOVA regions that are *excluded* from addressable range. Video hardware generates different stream IDs based on the range of IOVA addresses. Thereby IOVA addresses for firmware and data buffers need to be non overlapping. For ex. 0x0-0x25800000 address range is reserved for firmware stream-ID, while non_pixel (bitstream ) stream-ID can be generated by hardware only when bitstream buffers IOVA address is from 0x25800000-0xe0000000. Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> --- .../bindings/media/qcom,sm8550-iris.yaml | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+)