@@ -26,6 +26,7 @@
#include <Library/BaseMemoryLib.h>
#include <Library/MemoryAllocationLib.h>
#include <Library/UefiBootServicesTableLib.h>
+#include <Library/CacheMaintenanceLib.h>
#include <Library/DevicePathLib.h>
#include <Library/TimerLib.h>
@@ -49,6 +49,7 @@
BaseMemoryLib
UefiLib
BaseLib
+ CacheMaintenanceLib
UefiDriverEntryPoint
DebugLib
DevicePathLib
@@ -1449,6 +1449,7 @@ UfsExecScsiCmds (
UTP_TR_PRD *PrdtBase;
EFI_TPL OldTpl;
UFS_PASS_THRU_TRANS_REQ *TransReq;
+ UINTN TotalLen;
TransReq = AllocateZeroPool (sizeof (UFS_PASS_THRU_TRANS_REQ));
if (TransReq == NULL) {
@@ -1521,6 +1522,13 @@ UfsExecScsiCmds (
UfsInitUtpPrdt (PrdtBase, (VOID*)(UINTN)DataBufPhyAddr, DataLen);
//
+ // Flush & invalidate data cache since CmdDescHost is virtual address
+ // and Command UPIU is updated after Map ().
+ //
+ TotalLen = (TransReq->Trd->PrdtO << 2) + (TransReq->Trd->PrdtL << 2);
+ WriteBackInvalidateDataCacheRange (TransReq->CmdDescHost, TotalLen);
+
+ //
// Insert the async SCSI cmd to the Async I/O list
//
if (Event != NULL) {
Since command UPIU is initialized with virtual address that CPU accesses, need to add cache operation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> --- MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h | 1 + MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf | 1 + MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c | 8 ++++++++ 3 files changed, 10 insertions(+) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel