[Linaro-uefi,v5,1/3] Platforms: add skeleton of hikey platform

Add the skeleton of HiKey platform with generic BDS.
Support both 1GB and 2GB DDR RAM HiKey hardware.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
 Chips/Hisilicon/Hi6220/Hi6220.dec                  |  32 ++
 Chips/Hisilicon/Hi6220/Include/Hi6220.h            |  77 ++++
 Platforms/Hisilicon/HiKey/HiKey.dec                |  36 ++
 Platforms/Hisilicon/HiKey/HiKey.dsc                | 472 +++++++++++++++++++++
 Platforms/Hisilicon/HiKey/HiKey.fdf                | 350 +++++++++++++++
 Platforms/Hisilicon/HiKey/Include/ArmPlatform.h    |  26 ++
 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c | 159 +++++++
 .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S |  49 +++
 .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf  |  51 +++
 .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c    | 211 +++++++++
 10 files changed, 1463 insertions(+)
 create mode 100644 Chips/Hisilicon/Hi6220/Hi6220.dec
 create mode 100644 Chips/Hisilicon/Hi6220/Include/Hi6220.h
 create mode 100644 Platforms/Hisilicon/HiKey/HiKey.dec
 create mode 100644 Platforms/Hisilicon/HiKey/HiKey.dsc
 create mode 100644 Platforms/Hisilicon/HiKey/HiKey.fdf
 create mode 100644 Platforms/Hisilicon/HiKey/Include/ArmPlatform.h
 create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c
 create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S
 create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf
 create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c

On Tue, Jan 10, 2017 at 05:50:38PM +0800, Haojian Zhuang wrote:
> Add the skeleton of HiKey platform with generic BDS.
> Support both 1GB and 2GB DDR RAM HiKey hardware.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
> ---
>  Chips/Hisilicon/Hi6220/Hi6220.dec                  |  32 ++
>  Chips/Hisilicon/Hi6220/Include/Hi6220.h            |  77 ++++
>  Platforms/Hisilicon/HiKey/HiKey.dec                |  36 ++
>  Platforms/Hisilicon/HiKey/HiKey.dsc                | 472 +++++++++++++++++++++
>  Platforms/Hisilicon/HiKey/HiKey.fdf                | 350 +++++++++++++++
>  Platforms/Hisilicon/HiKey/Include/ArmPlatform.h    |  26 ++
>  Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c | 159 +++++++
>  .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S |  49 +++
>  .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf  |  51 +++
>  .../Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c    | 211 +++++++++
>  10 files changed, 1463 insertions(+)
>  create mode 100644 Chips/Hisilicon/Hi6220/Hi6220.dec
>  create mode 100644 Chips/Hisilicon/Hi6220/Include/Hi6220.h
>  create mode 100644 Platforms/Hisilicon/HiKey/HiKey.dec
>  create mode 100644 Platforms/Hisilicon/HiKey/HiKey.dsc
>  create mode 100644 Platforms/Hisilicon/HiKey/HiKey.fdf
>  create mode 100644 Platforms/Hisilicon/HiKey/Include/ArmPlatform.h
>  create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c
>  create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S
>  create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf
>  create mode 100644 Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c
> 
> diff --git a/Chips/Hisilicon/Hi6220/Hi6220.dec b/Chips/Hisilicon/Hi6220/Hi6220.dec
> new file mode 100644
> index 0000000..002bc66
> --- /dev/null
> +++ b/Chips/Hisilicon/Hi6220/Hi6220.dec
> @@ -0,0 +1,32 @@
> +#
> +#  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +[Defines]
> +  DEC_SPECIFICATION              = 0x00010019
> +  PACKAGE_NAME                   = HiKey
> +  PACKAGE_GUID                   = 01be44a1-5ed3-47fc-8ecf-daa83344678c
> +  PACKAGE_VERSION                = 0.1
> +
> +################################################################################
> +#
> +# Include Section - list of Include Paths that are provided by this package.
> +#                   Comments are used for Keywords and Module Types.
> +#
> +# Supported Module Types:
> +#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
> +#
> +################################################################################
> +[Includes.common]
> +  Include                        # Root include for the package
> +
> +[Guids.common]
> +  gHi6220TokenSpaceGuid      =  { 0x47fc9a0e, 0x1796, 0x4d04, { 0xaf, 0x68, 0x2b, 0xcb, 0x0d, 0x40, 0x84, 0x09} }
> diff --git a/Chips/Hisilicon/Hi6220/Include/Hi6220.h b/Chips/Hisilicon/Hi6220/Include/Hi6220.h
> new file mode 100644
> index 0000000..d4cdfde
> --- /dev/null
> +++ b/Chips/Hisilicon/Hi6220/Include/Hi6220.h
> @@ -0,0 +1,77 @@
> +/** @file
> +*
> +*  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials
> +*  are licensed and made available under the terms and conditions of the BSD License
> +*  which accompanies this distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#ifndef __HI6220_H__
> +#define __HI6220_H__
> +
> +/***********************************************************************************
> +// Platform Memory Map
> +************************************************************************************/
> +
> +// SOC peripherals (UART, I2C, I2S, USB, etc)
> +#define HI6220_PERIPH_BASE                      0xF4000000
> +#define HI6220_PERIPH_SZ                        0x05800000
> +
> +#define PERI_CTRL_BASE                          0xF7030000
> +#define SC_PERIPH_CTRL4                         0x00C
> +#define CTRL4_FPGA_EXT_PHY_SEL                  BIT3
> +#define CTRL4_PICO_SIDDQ                        BIT6
> +#define CTRL4_PICO_OGDISABLE                    BIT8
> +#define CTRL4_PICO_VBUSVLDEXT                   BIT10
> +#define CTRL4_PICO_VBUSVLDEXTSEL                BIT11
> +#define CTRL4_OTG_PHY_SEL                       BIT21
> +
> +#define SC_PERIPH_CTRL5                         0x010
> +
> +#define CTRL5_USBOTG_RES_SEL                    BIT3
> +#define CTRL5_PICOPHY_ACAENB                    BIT4
> +#define CTRL5_PICOPHY_BC_MODE                   BIT5
> +#define CTRL5_PICOPHY_CHRGSEL                   BIT6
> +#define CTRL5_PICOPHY_VDATSRCEND                BIT7
> +#define CTRL5_PICOPHY_VDATDETENB                BIT8
> +#define CTRL5_PICOPHY_DCDENB                    BIT9
> +#define CTRL5_PICOPHY_IDDIG                     BIT10
> +
> +#define SC_PERIPH_CTRL8                         0x018
> +#define SC_PERIPH_CLKEN0                        0x200
> +#define SC_PERIPH_CLKDIS0                       0x204
> +#define SC_PERIPH_CLKSTAT0                      0x208
> +
> +#define SC_PERIPH_RSTEN0                        0x300
> +#define SC_PERIPH_RSTDIS0                       0x304
> +#define SC_PERIPH_RSTSTAT0                      0x308
> +
> +#define RST0_USBOTG_BUS                         BIT4
> +#define RST0_POR_PICOPHY                        BIT5
> +#define RST0_USBOTG                             BIT6
> +#define RST0_USBOTG_32K                         BIT7
> +
> +#define EYE_PATTERN_PARA                        0x7053348c
> +
> +#define MDDRC_AXI_BASE                          0xF7120000
> +#define AXI_REGION_MAP_OFFSET(x)                ( 0x100 + ( x ) * 0x10 )
> +#define HIKEY_REGION_SIZE_MASK                  (7 << 8)
> +// (0 << 8) means 16MB, (7 << 8) means 2GB
> +#define HIKEY_REGION_SIZE(x)                    (1U << (((x & HIKEY_REGION_SIZE_MASK) >> 8) + 24))
> +
> +#define AO_CTRL_BASE                            0xF7800000
> +#define SC_PW_MTCMOS_EN0                        0x830
> +#define SC_PW_MTCMOS_DIS0                       0x834
> +#define SC_PW_MTCMOS_STAT0                      0x838
> +#define SC_PW_MTCMOS_ACK_STAT0                  0x83c
> +#define PW_EN0_G3D                              (1 << 1)
> +
> +#define PMUSSI_BASE                             0xF8000000
> +
> +#endif /* __HI6220_H__ */
> diff --git a/Platforms/Hisilicon/HiKey/HiKey.dec b/Platforms/Hisilicon/HiKey/HiKey.dec
> new file mode 100644
> index 0000000..537138e
> --- /dev/null
> +++ b/Platforms/Hisilicon/HiKey/HiKey.dec
> @@ -0,0 +1,36 @@
> +#
> +#  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +[Defines]
> +  DEC_SPECIFICATION              = 0x00010019
> +  PACKAGE_NAME                   = HiKey
> +  PACKAGE_GUID                   = d6db414d-ea67-4312-94d5-9c9e5b224d25
> +  PACKAGE_VERSION                = 0.1
> +
> +################################################################################
> +#
> +# Include Section - list of Include Paths that are provided by this package.
> +#                   Comments are used for Keywords and Module Types.
> +#
> +# Supported Module Types:
> +#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
> +#
> +################################################################################
> +[Includes.common]
> +  Include                        # Root include for the package
> +
> +[Guids.common]
> +  gHiKeyTokenSpaceGuid          =  { 0x91148425, 0xcdd2, 0x4830, { 0x8b, 0xd0, 0xc6, 0x1c, 0x6d, 0xea, 0x36, 0x21 } }
> +
> +[PcdsFixedAtBuild.common]
> +  gHiKeyTokenSpaceGuid.PcdAndroidFastbootNvmDevicePath|L""|VOID*|0x00000001
> +  gHiKeyTokenSpaceGuid.PcdArmFastbootFlashLimit|L""|VOID*|0x00000002
> diff --git a/Platforms/Hisilicon/HiKey/HiKey.dsc b/Platforms/Hisilicon/HiKey/HiKey.dsc
> new file mode 100644
> index 0000000..cfe1eda
> --- /dev/null
> +++ b/Platforms/Hisilicon/HiKey/HiKey.dsc
> @@ -0,0 +1,472 @@
> +#
> +#  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +################################################################################
> +#
> +# Defines Section - statements that will be processed to create a Makefile.
> +#
> +################################################################################
> +[Defines]
> +  PLATFORM_NAME                  = HiKey
> +  PLATFORM_GUID                  = 8edf1480-da5c-4857-bc02-7530bd8e7b7a
> +  PLATFORM_VERSION               = 0.2
> +  DSC_SPECIFICATION              = 0x00010019
> +  OUTPUT_DIRECTORY               = Build/HiKey
> +  SUPPORTED_ARCHITECTURES        = AARCH64
> +  BUILD_TARGETS                  = DEBUG|RELEASE
> +  SKUID_IDENTIFIER               = DEFAULT
> +  FLASH_DEFINITION               = OpenPlatformPkg/Platforms/Hisilicon/HiKey/HiKey.fdf
> +
> +[LibraryClasses.common]
> +!if $(TARGET) == RELEASE
> +  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
> +!else
> +  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
> +!endif
> +  DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
> +
> +  ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
> +  ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf
> +  ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf
> +  ArmHvcLib|ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
> +  ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
> +  ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf
> +
> +  ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf
> +  ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
> +  ArmPlatformLib|OpenPlatformPkg/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf
> +  ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
> +  ArmPlatformSysConfigLib|ArmPlatformPkg/Library/ArmPlatformSysConfigLibNull/ArmPlatformSysConfigLibNull.inf
> +
> +  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
> +  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
> +  CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
> +  DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
> +  CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
> +  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
> +  DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
> +  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
> +  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
> +  EfiResetSystemLib|ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf
> +  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
> +  SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
> +
> +  FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
> +  UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
> +  PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> +  CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
> +
> +  ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
> +  FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
> +  SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
> +
> +  # UiApp dependencies
> +  ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
> +  FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
> +  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
> +
> +  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
> +  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
> +  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
> +  UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
> +  TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
> +  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
> +  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
> +  UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
> +
> +  PL011UartLib|ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
> +  SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
> +  RealTimeClockLib|ArmPlatformPkg/Library/PL031RealTimeClockLib/PL031RealTimeClockLib.inf
> +
> +  NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
> +
> +  #
> +  # Assume everything is fixed at build
> +  #
> +  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
> +
> +  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
> +  PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf
> +  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
> +  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
> +  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
> +  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
> +  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
> +  UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
> +  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
> +
> +  # USB Requirements
> +  UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
> +  DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
> +
> +  UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
> +
> +  # Network Libraries
> +  UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
> +  NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
> +  DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
> +  IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
> +  UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
> +
> +[LibraryClasses.common.SEC]
> +  PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
> +  ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
> +  LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> +  MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
> +  HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
> +  PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
> +  PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
> +  PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
> +  MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
> +  ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf
> +  DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf
> +
> +[LibraryClasses.common.DXE_CORE]
> +  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
> +  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
> +  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
> +  HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
> +  MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
> +  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
> +
> +[LibraryClasses.common.UEFI_DRIVER]
> +  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
> +
> +[LibraryClasses.common.DXE_DRIVER]
> +  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
> +  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
> +  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
> +  SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
> +
> +[LibraryClasses.common.DXE_RUNTIME_DRIVER]
> +  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
> +  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
> +  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
> +  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf
> +
> +[BuildOptions]
> +  GCC:*_*_*_PLATFORM_FLAGS = -I$(WORKSPACE)/OpenPlatformPkg/Chips/Hisilicon/Hi6220/Include -I$(WORKSPACE)/OpenPlatformPkg/Platforms/Hisilicon/HiKey/Include
> +
> +[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
> +  GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000
> +
> +################################################################################
> +#
> +# Pcd Section - list of all EDK II PCD Entries defined by this Platform
> +#
> +################################################################################
> +
> +[PcdsFeatureFlag.common]
> +  #
> +  # Control what commands are supported from the UI
> +  # Turn these on and off to add features or save size
> +  #
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedMacBoot|TRUE
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedDirCmd|TRUE
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedHobCmd|TRUE
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedHwDebugCmd|TRUE
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedPciDebugCmd|TRUE
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedIoEnable|FALSE
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedScriptCmd|FALSE
> +
> +  gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
> +
> +  # Use the Vector Table location in CpuDxe. We will not copy the Vector Table at PcdCpuVectorBaseAddress
> +  gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE
> +
> +  gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob|TRUE
> +
> +  gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
> +
> +  ## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
> +  #  It could be set FALSE to save size.
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|FALSE
> +
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE
> +
> +[PcdsFixedAtBuild.common]
> +  gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
> +  gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
> +  gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000
> +  gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000
> +  gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF
> +  gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
> +  gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
> +  gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
> +
> +  # DEBUG_ASSERT_ENABLED       0x01
> +  # DEBUG_PRINT_ENABLED        0x02
> +  # DEBUG_CODE_ENABLED         0x04
> +  # CLEAR_MEMORY_ENABLED       0x08
> +  # ASSERT_BREAKPOINT_ENABLED  0x10
> +  # ASSERT_DEADLOOP_ENABLED    0x20
> +!if $(TARGET) == RELEASE
> +  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x21
> +!else
> +  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
> +!endif
> +
> +  #  DEBUG_INIT      0x00000001  // Initialization
> +  #  DEBUG_WARN      0x00000002  // Warnings
> +  #  DEBUG_LOAD      0x00000004  // Load events
> +  #  DEBUG_FS        0x00000008  // EFI File system
> +  #  DEBUG_POOL      0x00000010  // Alloc & Free's
> +  #  DEBUG_PAGE      0x00000020  // Alloc & Free's
> +  #  DEBUG_INFO      0x00000040  // Verbose
> +  #  DEBUG_DISPATCH  0x00000080  // PEI/DXE Dispatchers
> +  #  DEBUG_VARIABLE  0x00000100  // Variable
> +  #  DEBUG_BM        0x00000400  // Boot Manager
> +  #  DEBUG_BLKIO     0x00001000  // BlkIo Driver
> +  #  DEBUG_NET       0x00004000  // SNI Driver
> +  #  DEBUG_UNDI      0x00010000  // UNDI Driver
> +  #  DEBUG_LOADFILE  0x00020000  // Load File
> +  #  DEBUG_EVENT     0x00080000  // Event messages
> +  #  DEBUG_GCD       0x00100000  // Global Coherency Database changes
> +  #  DEBUG_CACHE     0x00200000  // Memory range cachability changes
> +  #  DEBUG_ERROR     0x80000000  // Error
> +  gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F
> +
> +  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
> +
> +  #
> +  # Optional feature to help prevent EFI memory map fragments
> +  # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
> +  # Values are in EFI Pages (4K). DXE Core will make sure that
> +  # at least this much of each type of memory can be allocated
> +  # from a single memory range. This way you only end up with
> +  # maximum of two fragements for each type in the memory map
> +  # (the memory used, and the free memory that was prereserved
> +  # but not used).
> +  #
> +  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIReclaimMemory|0
> +  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiACPIMemoryNVS|0
> +  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiReservedMemoryType|0
> +  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesData|80
> +  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiRuntimeServicesCode|65
> +  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesCode|400
> +  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiBootServicesData|20000
> +  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
> +  gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
> +
> +  gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
> +
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000
> +
> +  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"hikey"
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Alpha"
> +  gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"HiKey"
> +
> +  #
> +  # NV Storage PCDs.
> +  #
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x30000000
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x30010000
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x30020000
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
> +
> +  # System Memory (1GB)
> +  gArmTokenSpaceGuid.PcdSystemMemoryBase|0x00000000
> +  gArmTokenSpaceGuid.PcdSystemMemorySize|0x3E000000
> +
> +  # HiKey Dual-Cluster profile
> +  gArmPlatformTokenSpaceGuid.PcdCoreCount|8
> +  gArmPlatformTokenSpaceGuid.PcdClusterCount|2
> +
> +  gArmTokenSpaceGuid.PcdVFPEnabled|1
> +
> +  #
> +  # ARM Pcds
> +  #
> +  gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000000000000
> +
> +  #
> +  # ARM PrimeCell
> +  #
> +
> +  ## PL011 - Serial Terminal
> +  DEFINE SERIAL_BASE = 0xF7113000 # UART3
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|$(SERIAL_BASE)
> +  gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
> +  gArmPlatformTokenSpaceGuid.PL011UartInteger|10
> +  gArmPlatformTokenSpaceGuid.PL011UartFractional|26
> +
> +  ## PL031 RealTimeClock
> +  gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0xF8003000
> +
> +  #
> +  # ARM General Interrupt Controller
> +  #
> +  gArmTokenSpaceGuid.PcdGicDistributorBase|0xF6801000
> +  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xF6802000
> +
> +  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|10
> +
> +  # GUID of the UEFI Shell
> +  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
> +
> +  # GUID of the UI app
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
> +
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
> +
> +  gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
> +
> +  #
> +  # Fastboot
> +  #
> +  gEmbeddedTokenSpaceGuid.PcdAndroidFastbootUsbVendorId|0x18d1
> +  gEmbeddedTokenSpaceGuid.PcdAndroidFastbootUsbProductId|0xd00d
> +
> +################################################################################
> +#
> +# Components Section - list of all EDK II Modules needed by this Platform
> +#
> +################################################################################
> +[Components.common]
> +  #
> +  # PEI Phase modules
> +  #
> +  ArmPlatformPkg/PrePi/PeiUniCore.inf
> +
> +  #
> +  # DXE
> +  #
> +  MdeModulePkg/Core/Dxe/DxeMain.inf {
> +    <LibraryClasses>
> +      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
> +      NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
> +  }
> +
> +  #
> +  # Architectural Protocols
> +  #
> +  ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> +  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> +  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> +  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
> +  EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
> +  EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
> +  EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
> +  EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
> +
> +  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
> +  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
> +  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
> +  MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> +
> +  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
> +  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
> +
> +  ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> +  ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> +
> +  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
> +
> +  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> +
> +  #
> +  # GPIO
> +  #
> +  ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf
> +
> +  #
> +  # MMC/SD
> +  #
> +  EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
> +
> +  #
> +  # USB Host Support
> +  #
> +  MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
> +
> +  #
> +  # USB Mass Storage Support
> +  #
> +  MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
> +
> +  #
> +  # USB Peripheral Support
> +  #
> +  EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf
> +
> +  #
> +  # Fastboot
> +  #
> +  EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf {
> +    <LibraryClasses>
> +      BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf
> +  }
> +
> +
> +  #
> +  # UEFI Network Stack
> +  #
> +  MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
> +  MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
> +  MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> +  MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
> +  MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
> +  MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
> +  MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
> +  MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
> +  MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
> +
> +  #
> +  # AX88772 Ethernet Driver
> +  #
> +  OptionRomPkg/Bus/Usb/UsbNetworking/Ax88772b/Ax88772b.inf
> +
> +  #
> +  # FAT filesystem + GPT/MBR partitioning
> +  #
> +  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
> +  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> +  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
> +
> +  #
> +  # Bds
> +  #
> +  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
> +  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
> +  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> +  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +  MdeModulePkg/Application/UiApp/UiApp.inf {
> +    <LibraryClasses>
> +      NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
> +      NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
> +      NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
> +      PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
> +  }
> +  ShellPkg/Application/Shell/Shell.inf {
> +    <LibraryClasses>
> +      ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
> +      NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
> +      NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
> +      NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
> +      NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
> +      NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
> +      NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
> +      NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
> +      NULL|ShellPkg/Library/UefiShellTftpCommandLib/UefiShellTftpCommandLib.inf
> +      HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
> +      PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
> +      BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
> +    <PcdsFixedAtBuild>
> +      gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
> +      gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
> +      gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
> +  }
> diff --git a/Platforms/Hisilicon/HiKey/HiKey.fdf b/Platforms/Hisilicon/HiKey/HiKey.fdf
> new file mode 100644
> index 0000000..b183c46
> --- /dev/null
> +++ b/Platforms/Hisilicon/HiKey/HiKey.fdf
> @@ -0,0 +1,350 @@
> +#
> +#  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +################################################################################
> +#
> +# FD Section
> +# The [FD] Section is made up of the definition statements and a
> +# description of what goes into  the Flash Device Image.  Each FD section
> +# defines one flash "device" image.  A flash device image may be one of
> +# the following: Removable media bootable image (like a boot floppy
> +# image,) an Option ROM image (that would be "flashed" into an add-in
> +# card,) a System "Flash"  image (that would be burned into a system's
> +# flash) or an Update ("Capsule") image that will be used to update and
> +# existing system flash.
> +#
> +################################################################################
> +
> +[FD.BL33_AP_UEFI]
> +BaseAddress   = 0x35000000|gArmTokenSpaceGuid.PcdFdBaseAddress  # The base address of the Firmware in NOR Flash.
> +Size          = 0x000F0000|gArmTokenSpaceGuid.PcdFdSize         # The size in bytes of the FLASH Device
> +ErasePolarity = 1
> +
> +# This one is tricky, it must be: BlockSize * NumBlocks = Size
> +BlockSize     = 0x00001000
> +NumBlocks     = 0xF0
> +
> +################################################################################
> +#
> +# Following are lists of FD Region layout which correspond to the locations of different
> +# images within the flash device.
> +#
> +# Regions must be defined in ascending order and may not overlap.
> +#
> +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
> +# the pipe "|" character, followed by the size of the region, also in hex with the leading
> +# "0x" characters. Like:
> +# Offset|Size
> +# PcdOffsetCName|PcdSizeCName
> +# RegionType <FV, DATA, or FILE>
> +#
> +################################################################################
> +
> +0x00000000|0x000F0000
> +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
> +FV = FVMAIN_COMPACT
> +
> +
> +################################################################################
> +#
> +# FV Section
> +#
> +# [FV] section is used to define what components or modules are placed within a flash
> +# device file.  This section also defines order the components and modules are positioned
> +# within the image.  The [FV] section consists of define statements, set statements and
> +# module statements.
> +#
> +################################################################################
> +
> +[FV.FvMain]
> +FvNameGuid         = 69b7d469-55a2-49d8-a426-42bfb22f5b9d
> +BlockSize          = 0x40
> +NumBlocks          = 0         # This FV gets compressed so make it just big enough
> +FvAlignment        = 8         # FV alignment and FV attributes setting.
> +ERASE_POLARITY     = 1
> +MEMORY_MAPPED      = TRUE
> +STICKY_WRITE       = TRUE
> +LOCK_CAP           = TRUE
> +LOCK_STATUS        = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP  = TRUE
> +WRITE_STATUS       = TRUE
> +WRITE_LOCK_CAP     = TRUE
> +WRITE_LOCK_STATUS  = TRUE
> +READ_DISABLED_CAP  = TRUE
> +READ_ENABLED_CAP   = TRUE
> +READ_STATUS        = TRUE
> +READ_LOCK_CAP      = TRUE
> +READ_LOCK_STATUS   = TRUE
> +
> +  INF MdeModulePkg/Core/Dxe/DxeMain.inf
> +
> +  #
> +  # PI DXE Drivers producing Architectural Protocols (EFI Services)
> +  #
> +  INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
> +  INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
> +  INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
> +  INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
> +  INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
> +  INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
> +  INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
> +  INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
> +
> +  #
> +  # Multiple Console IO support
> +  #
> +  INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
> +  INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
> +  INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> +
> +  INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> +  INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> +
> +  INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
> +
> +  INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
> +
> +  #
> +  # GPIO
> +  #
> +  INF ArmPlatformPkg/Drivers/PL061GpioDxe/PL061GpioDxe.inf
> +
> +  #
> +  # Multimedia Card Interface
> +  #
> +  INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
> +
> +  #
> +  # USB Host Support
> +  #
> +  INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
> +
> +  #
> +  # USB Mass Storage Support
> +  #
> +  INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
> +
> +  #
> +  # USB Peripheral Support
> +  #
> +  INF EmbeddedPkg/Drivers/AndroidFastbootTransportUsbDxe/FastbootTransportUsbDxe.inf
> +
> +  #
> +  # Fastboot
> +  #
> +  INF EmbeddedPkg/Application/AndroidFastboot/AndroidFastbootApp.inf
> +
> +  #
> +  # UEFI Network Stack
> +  #
> +  INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
> +  INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
> +  INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> +  INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
> +  INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
> +  INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
> +  INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
> +  INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
> +  INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
> +
> +  #
> +  # AX88772 Ethernet Driver for Apple Ethernet Adapter
> +  #
> +  INF OptionRomPkg/Bus/Usb/UsbNetworking/Ax88772b/Ax88772b.inf
> +
> +  #
> +  # FAT filesystem + GPT/MBR partitioning
> +  #
> +  INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
> +  INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> +  INF FatBinPkg/EnhancedFatDxe/Fat.inf
> +  INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
> +
> +  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
> +  INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf
> +
> +  INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
> +
> +  #
> +  # UEFI applications
> +  #
> +  INF ShellPkg/Application/Shell/Shell.inf
> +
> +  #
> +  # Bds
> +  #
> +  INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
> +  INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +  INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> +  INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +  INF MdeModulePkg/Application/UiApp/UiApp.inf
> +
> +[FV.FVMAIN_COMPACT]
> +FvAlignment        = 8
> +ERASE_POLARITY     = 1
> +MEMORY_MAPPED      = TRUE
> +STICKY_WRITE       = TRUE
> +LOCK_CAP           = TRUE
> +LOCK_STATUS        = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP  = TRUE
> +WRITE_STATUS       = TRUE
> +WRITE_LOCK_CAP     = TRUE
> +WRITE_LOCK_STATUS  = TRUE
> +READ_DISABLED_CAP  = TRUE
> +READ_ENABLED_CAP   = TRUE
> +READ_STATUS        = TRUE
> +READ_LOCK_CAP      = TRUE
> +READ_LOCK_STATUS   = TRUE
> +
> +  INF ArmPlatformPkg/PrePi/PeiUniCore.inf
> +
> +  FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> +    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
> +      SECTION FV_IMAGE = FVMAIN
> +    }
> +  }
> +
> +
> +################################################################################
> +#
> +# Rules are use with the [FV] section's module INF type to define
> +# how an FFS file is created for a given INF file. The following Rule are the default
> +# rules for the different module type. User can add the customized rules to define the
> +# content of the FFS file.
> +#
> +################################################################################
> +
> +
> +############################################################################
> +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section   #
> +############################################################################
> +#
> +#[Rule.Common.DXE_DRIVER]
> +#  FILE DRIVER = $(NAMED_GUID) {
> +#    DXE_DEPEX    DXE_DEPEX               Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
> +#    COMPRESS PI_STD {
> +#      GUIDED {
> +#        PE32     PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
> +#        UI       STRING="$(MODULE_NAME)" Optional
> +#        VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
> +#      }
> +#    }
> +#  }
> +#
> +############################################################################
> +
> +#
> +# These SEC rules are used for ArmPlatformPkg/PrePi module.
> +# ArmPlatformPkg/PrePi is declared as a SEC module to make GenFv patch the
> +# UEFI Firmware to jump to ArmPlatformPkg/PrePi entrypoint
> +#
> +[Rule.ARM.SEC]
> +  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
> +    TE  TE    Align = 32                $(INF_OUTPUT)/$(MODULE_NAME).efi
> +  }
> +
> +[Rule.AARCH64.SEC]
> +  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
> +    TE  TE    Align = 4K                $(INF_OUTPUT)/$(MODULE_NAME).efi
> +  }
> +
> +# A shim specific rule is required to ensure the alignment is 4K.
> +# Otherwise BaseTools pick up the AArch32 alignment (ie: 32)
> +[Rule.ARM.SEC.SHIM]
> +  FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
> +    TE  TE    Align = 4K                $(INF_OUTPUT)/$(MODULE_NAME).efi
> +  }
> +
> +[Rule.Common.PEI_CORE]
> +  FILE PEI_CORE = $(NAMED_GUID) {
> +    TE     TE                           $(INF_OUTPUT)/$(MODULE_NAME).efi
> +    UI     STRING ="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.PEIM]
> +  FILE PEIM = $(NAMED_GUID) {
> +     PEI_DEPEX PEI_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
> +     TE       TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
> +     UI       STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.PEIM.TIANOCOMPRESSED]
> +  FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
> +    PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
> +    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
> +      PE32      PE32                    $(INF_OUTPUT)/$(MODULE_NAME).efi
> +      UI        STRING="$(MODULE_NAME)" Optional
> +    }
> +  }
> +
> +[Rule.Common.DXE_CORE]
> +  FILE DXE_CORE = $(NAMED_GUID) {
> +    PE32     PE32                       $(INF_OUTPUT)/$(MODULE_NAME).efi
> +    UI       STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.UEFI_DRIVER]
> +  FILE DRIVER = $(NAMED_GUID) {
> +    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
> +    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
> +    UI           STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.DXE_DRIVER]
> +  FILE DRIVER = $(NAMED_GUID) {
> +    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
> +    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
> +    UI           STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.DXE_DRIVER.BINARY]
> +  FILE DRIVER = $(NAMED_GUID) {
> +  DXE_DEPEX    DXE_DEPEX              Optional |.depex
> +  PE32         PE32                   |.efi
> +  UI           STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.DXE_RUNTIME_DRIVER]
> +  FILE DRIVER = $(NAMED_GUID) {
> +    DXE_DEPEX    DXE_DEPEX              Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
> +    PE32         PE32                   $(INF_OUTPUT)/$(MODULE_NAME).efi
> +    UI           STRING="$(MODULE_NAME)" Optional
> +  }
> +
> +[Rule.Common.UEFI_APPLICATION]
> +  FILE APPLICATION = $(NAMED_GUID) {
> +    UI     STRING ="$(MODULE_NAME)" Optional
> +    PE32   PE32                         $(INF_OUTPUT)/$(MODULE_NAME).efi
> +  }
> +
> +[Rule.Common.UEFI_DRIVER.BINARY]
> +  FILE DRIVER = $(NAMED_GUID) {
> +    DXE_DEPEX DXE_DEPEX Optional      |.depex
> +    PE32      PE32                    |.efi
> +    UI        STRING="$(MODULE_NAME)" Optional
> +    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
> +  }
> +
> +[Rule.Common.UEFI_APPLICATION.BINARY]
> +  FILE APPLICATION = $(NAMED_GUID) {
> +    PE32      PE32                    |.efi
> +    UI        STRING="$(MODULE_NAME)" Optional
> +    VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
> +  }
> +
> +[Rule.Common.USER_DEFINED.ACPITABLE]
> +  FILE FREEFORM = $(NAMED_GUID) {
> +    RAW ACPI               |.acpi
> +    RAW ASL                |.aml
> +  }
> diff --git a/Platforms/Hisilicon/HiKey/Include/ArmPlatform.h b/Platforms/Hisilicon/HiKey/Include/ArmPlatform.h
> new file mode 100644
> index 0000000..e60478f
> --- /dev/null
> +++ b/Platforms/Hisilicon/HiKey/Include/ArmPlatform.h
> @@ -0,0 +1,26 @@
> +/** @file
> +*
> +*  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials
> +*  are licensed and made available under the terms and conditions of the BSD License
> +*  which accompanies this distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#ifndef __PLATFORM_H__
> +#define __PLATFORM_H__
> +
> +//
> +// We don't care about this value, but the PL031 driver depends on the macro
> +// to exist: it will pass it on to our ArmPlatformSysConfigLib:ConfigGet()
> +// function, which just returns EFI_UNSUPPORTED.
> +//
> +//
> +#define SYS_CFG_RTC                             0
> +
> +#endif /* __PLATFORM_H__ */
> diff --git a/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c b/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c
> new file mode 100644
> index 0000000..f4a47b2
> --- /dev/null
> +++ b/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKey.c
> @@ -0,0 +1,159 @@
> +/** @file
> +*
> +*  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials
> +*  are licensed and made available under the terms and conditions of the BSD License
> +*  which accompanies this distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <Library/ArmPlatformLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/PcdLib.h>
> +
> +#include <Ppi/ArmMpCoreInfo.h>
> +
> +#include <Hi6220.h>
> +
> +ARM_CORE_INFO mHiKeyInfoTable[] = {
> +  {
> +    // Cluster 0, Core 0
> +    0x0, 0x0,
> +
> +    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
> +    (UINT64)0xFFFFFFFF
> +  },
> +  {
> +    // Cluster 0, Core 1
> +    0x0, 0x1,
> +
> +    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
> +    (UINT64)0xFFFFFFFF
> +  },
> +  {
> +    // Cluster 0, Core 2
> +    0x0, 0x2,
> +
> +    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
> +    (UINT64)0xFFFFFFFF
> +  },
> +  {
> +    // Cluster 0, Core 3
> +    0x0, 0x3,
> +
> +    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
> +    (UINT64)0xFFFFFFFF
> +  },
> +  {
> +    // Cluster 1, Core 0
> +    0x1, 0x0,
> +
> +    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
> +    (UINT64)0xFFFFFFFF
> +  },
> +  {
> +    // Cluster 1, Core 1
> +    0x1, 0x1,
> +
> +    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
> +    (UINT64)0xFFFFFFFF
> +  },
> +  {
> +    // Cluster 1, Core 2
> +    0x1, 0x2,
> +
> +    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
> +    (UINT64)0xFFFFFFFF
> +  },
> +  {
> +    // Cluster 1, Core 3
> +    0x1, 0x3,
> +
> +    // MP Core MailBox Set/Get/Clear Addresses and Clear Value
> +    (UINT64)0xFFFFFFFF
> +  }
> +};
> +
> +/**
> +  Return the current Boot Mode
> +
> +  This function returns the boot reason on the platform
> +
> +  @return   Return the current Boot Mode of the platform
> +
> +**/
> +EFI_BOOT_MODE
> +ArmPlatformGetBootMode (
> +  VOID
> +  )
> +{
> +  return BOOT_WITH_FULL_CONFIGURATION;
> +}
> +
> +/**
> +  Initialize controllers that must setup in the normal world
> +
> +  This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
> +  in the PEI phase.
> +
> +**/
> +RETURN_STATUS
> +ArmPlatformInitialize (
> +  IN  UINTN                     MpId
> +  )
> +{
> +  return RETURN_SUCCESS;
> +}
> +
> +/**
> +  Initialize the system (or sometimes called permanent) memory
> +
> +  This memory is generally represented by the DRAM.
> +
> +**/
> +VOID
> +ArmPlatformInitializeSystemMemory (
> +  VOID
> +  )
> +{
> +}
> +
> +EFI_STATUS
> +PrePeiCoreGetMpCoreInfo (
> +  OUT UINTN                   *CoreCount,
> +  OUT ARM_CORE_INFO           **ArmCoreTable
> +  )
> +{
> +  // Only support one cluster
> +  *CoreCount    = sizeof(mHiKeyInfoTable) / sizeof(ARM_CORE_INFO);
> +  *ArmCoreTable = mHiKeyInfoTable;
> +  return EFI_SUCCESS;
> +}
> +
> +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
> +EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
> +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
> +
> +EFI_PEI_PPI_DESCRIPTOR      gPlatformPpiTable[] = {
> +  {
> +    EFI_PEI_PPI_DESCRIPTOR_PPI,
> +    &mArmMpCoreInfoPpiGuid,
> +    &mMpCoreInfoPpi
> +  }
> +};
> +
> +VOID
> +ArmPlatformGetPlatformPpiList (
> +  OUT UINTN                   *PpiListSize,
> +  OUT EFI_PEI_PPI_DESCRIPTOR  **PpiList
> +  )
> +{
> +  *PpiListSize = sizeof(gPlatformPpiTable);
> +  *PpiList = gPlatformPpiTable;
> +}
> diff --git a/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S b/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S
> new file mode 100644
> index 0000000..0e8f1bb
> --- /dev/null
> +++ b/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyHelper.S
> @@ -0,0 +1,49 @@
> +#
> +#  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#
> +
> +#include <AsmMacroIoLibV8.h>
> +#include <Library/ArmLib.h>
> +
> +ASM_FUNC(ArmPlatformPeiBootAction)
> +  ret
> +
> +//UINTN
> +//ArmPlatformGetCorePosition (
> +//  IN UINTN MpId
> +//  );
> +// With this function: CorePos = (ClusterId * 4) + CoreId
> +ASM_FUNC(ArmPlatformGetCorePosition)
> +  and   x1, x0, #ARM_CORE_MASK
> +  and   x0, x0, #ARM_CLUSTER_MASK
> +  add   x0, x1, x0, LSR #6
> +  ret
> +
> +//UINTN
> +//ArmPlatformGetPrimaryCoreMpId (
> +//  VOID
> +//  );
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> +  MOV32 (w0, FixedPcdGet32(PcdArmPrimaryCore))
> +  ret
> +
> +//UINTN
> +//ArmPlatformIsPrimaryCore (
> +//  IN UINTN MpId
> +//  );
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> +  MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCoreMask))
> +  and   x0, x0, x1
> +  MOV32 (w1, FixedPcdGet32(PcdArmPrimaryCore))
> +  cmp   w0, w1
> +  cset  x0, eq
> +  ret
> diff --git a/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf b/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf
> new file mode 100644
> index 0000000..aa0b8b8
> --- /dev/null
> +++ b/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyLib.inf
> @@ -0,0 +1,51 @@
> +#
> +#  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
> +#
> +#  This program and the accompanying materials
> +#  are licensed and made available under the terms and conditions of the BSD License
> +#  which accompanies this distribution.  The full text of the license may be found at
> +#  http://opensource.org/licenses/bsd-license.php
> +#
> +#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +
> +[Defines]
> +  INF_VERSION                    = 0x00010019
> +  BASE_NAME                      = HiKeyLib
> +  FILE_GUID                      = 1f6c5192-f35c-462d-877c-8ee3227fff01
> +  MODULE_TYPE                    = BASE
> +  VERSION_STRING                 = 1.0
> +  LIBRARY_CLASS                  = ArmPlatformLib
> +
> +[Packages]
> +  ArmPkg/ArmPkg.dec
> +  ArmPlatformPkg/ArmPlatformPkg.dec
> +  EmbeddedPkg/EmbeddedPkg.dec
> +  MdePkg/MdePkg.dec
> +  MdeModulePkg/MdeModulePkg.dec
> +  OpenPlatformPkg/Chips/Hisilicon/Hi6220/Hi6220.dec
> +  OpenPlatformPkg/Platforms/Hisilicon/HiKey/HiKey.dec
> +
> +[LibraryClasses]
> +  ArmLib
> +  HobLib
> +  IoLib
> +  MemoryAllocationLib
> +  SerialPortLib
> +
> +[Sources.common]
> +  HiKey.c
> +  HiKeyMem.c
> +
> +[Sources.AARCH64]
> +  HiKeyHelper.S
> +
> +[FeaturePcd]
> +  gEmbeddedTokenSpaceGuid.PcdCacheEnable
> +
> +[FixedPcd]
> +  gArmTokenSpaceGuid.PcdArmPrimaryCore
> +  gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
> +  gArmTokenSpaceGuid.PcdSystemMemoryBase
> +  gArmTokenSpaceGuid.PcdSystemMemorySize
> diff --git a/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c b/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c
> new file mode 100644
> index 0000000..4c3ea37
> --- /dev/null
> +++ b/Platforms/Hisilicon/HiKey/Library/HiKeyLib/HiKeyMem.c
> @@ -0,0 +1,211 @@
> +/** @file
> +*
> +*  Copyright (c) 2014-2017, Linaro Limited. All rights reserved.
> +*
> +*  This program and the accompanying materials
> +*  are licensed and made available under the terms and conditions of the BSD License
> +*  which accompanies this distribution.  The full text of the license may be found at
> +*  http://opensource.org/licenses/bsd-license.php
> +*
> +*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include <Library/ArmPlatformLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/HobLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +
> +#include <Hi6220.h>
> +
> +// The total number of descriptors, including the final "end-of-table" descriptor.
> +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 12
> +
> +// DDR attributes
> +#define DDR_ATTRIBUTES_CACHED           ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
> +#define DDR_ATTRIBUTES_UNCACHED         ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
> +
> +#define HIKEY_EXTRA_SYSTEM_MEMORY_BASE  0x40000000
> +#define HIKEY_EXTRA_SYSTEM_MEMORY_SIZE  0x40000000
> +
> +STATIC struct HiKeyReservedMemory {
> +  EFI_PHYSICAL_ADDRESS         Offset;
> +  EFI_PHYSICAL_ADDRESS         Size;
> +} HiKeyReservedMemoryBuffer [] = {
> +  { 0x05E00000, 0x00100000 },    // MCU
> +  { 0x05F01000, 0x00001000 },    // ADB REBOOT "REASON"
> +  { 0x06DFF000, 0x00001000 },    // MAILBOX
> +  { 0x0740F000, 0x00001000 },    // MAILBOX
> +  { 0x21F00000, 0x00100000 },    // PSTORE/RAMOOPS
> +  { 0x3E000000, 0x02000000 }     // TEE OS
> +};
> +
> +STATIC
> +UINT64
> +EFIAPI
> +HiKeyInitMemorySize (
> +  IN VOID
> +  )
> +{
> +  UINT32               Count, Data;
> +  UINT64               MemorySize;
> +
> +  Count = 0;
> +  //
> +  // Repeat until find the last register that contains memory
>    // layout information.

OK, that makes some level of sense - but it is still not entirely
clear to me what is going on. (continued below)

> +  //
> +  while (MmioRead32 (MDDRC_AXI_BASE + AXI_REGION_MAP_OFFSET (Count)) != 0) {
> +    Count++;
> +  }

So, the DDR controller contains a series of configurable regions,
starting at offset 0x100 from the DDR controller base address?

From there on, every 4th 32-bit word contains some type of information
regarding a "region" of memory?

What is a "region"? Does it correspond to a DDR chip, or some form of
subpartition?

Is this information that has been programmed into the DDR controller
by previous layers of firmware?

How many regions are presented in the HiKey?

> +  Data = MmioRead32 (MDDRC_AXI_BASE + AXI_REGION_MAP_OFFSET (Count - 1));
> +  MemorySize = HIKEY_REGION_SIZE(Data);
> +  return MemorySize;
> +}
> +
> +/**
> +  Return the Virtual Memory Map of your platform
> +
> +  This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
> +
> +  @param[out]   VirtualMemoryMap    Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
> +                                    Virtual Memory mapping. This array must be ended by a zero-filled
> +                                    entry
> +
> +**/
> +VOID
> +ArmPlatformGetVirtualMemoryMap (
> +  IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
> +  )
> +{
> +  ARM_MEMORY_REGION_ATTRIBUTES  CacheAttributes;
> +  UINTN                         Index = 0, Count, ReservedTop;
> +  ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;
> +  EFI_PEI_HOB_POINTERS          NextHob;
> +  EFI_RESOURCE_ATTRIBUTE_TYPE   ResourceAttributes;
> +  UINT64                        ResourceLength;
> +  EFI_PHYSICAL_ADDRESS          ResourceTop;
> +  UINT64                        MemorySize, AdditionalMemorySize;
> +
> +  MemorySize = HiKeyInitMemorySize ();
> +  if (MemorySize == 0) {
> +    MemorySize = PcdGet64 (PcdSystemMemorySize);
> +  }
> +
> +  ResourceAttributes = (
> +      EFI_RESOURCE_ATTRIBUTE_PRESENT |

Indentation should be 2 spaces not 4.

> +      EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
> +      EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
> +      EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
> +      EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
> +      EFI_RESOURCE_ATTRIBUTE_TESTED
> +  );
> +
> +  // Create initial Base Hob for system memory.
> +  BuildResourceDescriptorHob (
> +      EFI_RESOURCE_SYSTEM_MEMORY,

Indentation should be 2 spaces not 4.

> +      ResourceAttributes,
> +      PcdGet64 (PcdSystemMemoryBase),
> +      PcdGet64 (PcdSystemMemorySize)
> +  );
> +
> +  NextHob.Raw = GetHobList ();
> +  Count = sizeof (HiKeyReservedMemoryBuffer) / sizeof (struct HiKeyReservedMemory);
> +  while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {
> +    if (Index >= Count) {
> +      break;
> +    }
> +    if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
> +        (HiKeyReservedMemoryBuffer[Index].Offset >= NextHob.ResourceDescriptor->PhysicalStart) &&
> +        ((HiKeyReservedMemoryBuffer[Index].Offset + HiKeyReservedMemoryBuffer[Index].Size) <=
> +         NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDescriptor->ResourceLength)) {
> +      ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute;
> +      ResourceLength = NextHob.ResourceDescriptor->ResourceLength;
> +      ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength;
> +      ReservedTop = HiKeyReservedMemoryBuffer[Index].Offset + HiKeyReservedMemoryBuffer[Index].Size;
> +
> +      // Create the System Memory HOB for the reserved buffer
> +      BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_RESERVED,
> +                                  EFI_RESOURCE_ATTRIBUTE_PRESENT,
> +                                  HiKeyReservedMemoryBuffer[Index].Offset,
> +                                  HiKeyReservedMemoryBuffer[Index].Size);
> +      // Update the HOB
> +      NextHob.ResourceDescriptor->ResourceLength = HiKeyReservedMemoryBuffer[Index].Offset - NextHob.ResourceDescriptor->PhysicalStart;
> +
> +      // If there is some memory available on the top of the reserved memory then create a HOB
> +      if (ReservedTop < ResourceTop) {
> +        BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
> +                                    ResourceAttributes,
> +                                    ReservedTop,
> +                                    ResourceTop - ReservedTop);
> +      }
> +      Index++;
> +    }
> +    NextHob.Raw = GET_NEXT_HOB (NextHob);
> +  }
> +
> +  AdditionalMemorySize = MemorySize - PcdGet64 (PcdSystemMemorySize);
> +  if (AdditionalMemorySize >= SIZE_1GB) {
> +    // Declared the additional memory
> +    ResourceAttributes =

Indentation should be 2 spaces not 4.

> +        EFI_RESOURCE_ATTRIBUTE_PRESENT |
> +        EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
> +        EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
> +        EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
> +        EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
> +        EFI_RESOURCE_ATTRIBUTE_TESTED;
> +
> +    BuildResourceDescriptorHob (
> +      EFI_RESOURCE_SYSTEM_MEMORY,
> +      ResourceAttributes,
> +      HIKEY_EXTRA_SYSTEM_MEMORY_BASE,
> +      HIKEY_EXTRA_SYSTEM_MEMORY_SIZE);
> +  }
> +
> +  ASSERT (VirtualMemoryMap != NULL);
> +
> +  VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
> +  if (VirtualMemoryTable == NULL) {

Indentation should be 2 spaces not 4.

> +      return;
> +  }
> +
> +  if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
> +      CacheAttributes = DDR_ATTRIBUTES_CACHED;

Indentation should be 2 spaces not 4.

> +  } else {
> +      CacheAttributes = DDR_ATTRIBUTES_UNCACHED;

Indentation should be 2 spaces not 4.

/
    Leif

> +  }
> +
> +  Index = 0;
> +
> +  // Hi6220 SOC peripherals
> +  VirtualMemoryTable[Index].PhysicalBase    = HI6220_PERIPH_BASE;
> +  VirtualMemoryTable[Index].VirtualBase     = HI6220_PERIPH_BASE;
> +  VirtualMemoryTable[Index].Length          = HI6220_PERIPH_SZ;
> +  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
> +
> +  // DDR - predefined 1GB size
> +  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBase);
> +  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBase);
> +  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);
> +  VirtualMemoryTable[Index].Attributes      = CacheAttributes;
> +
> +  // If DDR capacity is 2GB size, append a new entry to fill the gap.
> +  if (AdditionalMemorySize >= SIZE_1GB) {
> +    VirtualMemoryTable[++Index].PhysicalBase = HIKEY_EXTRA_SYSTEM_MEMORY_BASE;
> +    VirtualMemoryTable[Index].VirtualBase    = HIKEY_EXTRA_SYSTEM_MEMORY_BASE;
> +    VirtualMemoryTable[Index].Length         = HIKEY_EXTRA_SYSTEM_MEMORY_SIZE;
> +    VirtualMemoryTable[Index].Attributes     = CacheAttributes;
> +  }
> +
> +  // End of Table
> +  VirtualMemoryTable[++Index].PhysicalBase  = 0;
> +  VirtualMemoryTable[Index].VirtualBase     = 0;
> +  VirtualMemoryTable[Index].Length          = 0;
> +  VirtualMemoryTable[Index].Attributes      = (ARM_MEMORY_REGION_ATTRIBUTES)0;
> +
> +  ASSERT((Index + 1) <= MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
> +
> +  *VirtualMemoryMap = VirtualMemoryTable;
> +}
> -- 
> 2.7.4
>