| Message ID | 20170122122254.10764-1-linus.walleij@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | None | expand |
Hi Linus,
please add right baudrate and partition scheme for NAS 4220
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
---
arch/arm/boot/dts/gemini-nas4220b.dts | 36 +++++++++++++++++++++++++++++++++--
1 file changed, 34 insertions(+), 2 deletions(-)
--
2.11.0diff --git a/arch/arm/boot/dts/gemini-nas4220b.dts b/arch/arm/boot/dts/gemini-nas4220b.dts
index 0b30cdeb2354..7668ba52158e 100644
--- a/arch/arm/boot/dts/gemini-nas4220b.dts
+++ b/arch/arm/boot/dts/gemini-nas4220b.dts
@@ -19,7 +19,7 @@
};
chosen {
- bootargs = "console=ttyS0,115200n8";
+ bootargs = "console=ttyS0,19200n8";
stdout-path = &uart0;
};
@@ -64,7 +64,39 @@
status = "okay";
/* 16MB of flash */
reg = <0x30000000 0x01000000>;
- /* TODO: add flash partitions here */
+
+ partition@0 {
+ label = "RedBoot";
+ reg = <0x00000000 0x00020000>;
+ read-only;
+ };
+ partition@20000 {
+ label = "Kernel";
+ reg = <0x00020000 0x00300000>;
+ };
+ partition@320000 {
+ label = "Ramdisk";
+ reg = <0x00320000 0x00600000>;
+ };
+ partition@920000 {
+ label = "Application";
+ reg = <0x00920000 0x00600000>;
+ };
+ partition@f20000 {
+ label = "VCTL";
+ reg = <0x00f20000 0x00020000>;
+ read-only;
+ };
+ partition@f40000 {
+ label = "CurConf";
+ reg = <0x00f40000 0x000a0000>;
+ read-only;
+ };
+ partition@fe0000 {
+ label = "FIS directory";
+ reg = <0x00fe0000 0x00020000>;
+ read-only;
+ };
};
};
};
On Sun, Feb 5, 2017 at 10:53 AM, Hans Ulli Kroll <ulli.kroll@googlemail.com> wrote: > Hi Linus, > > please add right baudrate and partition scheme for NAS 4220 > > Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Thanks Hans! I folded this into the NAS 4220 device tree and added your Signed-off-by to the patch. Yours, Linus Walleij
HI Linus On Tue, 7 Feb 2017, Linus Walleij wrote: > On Sun, Feb 5, 2017 at 10:53 AM, Hans Ulli Kroll > <ulli.kroll@googlemail.com> wrote: > > > Hi Linus, > > > > please add right baudrate and partition scheme for NAS 4220 > > > > Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> > > Thanks Hans! I folded this into the NAS 4220 device tree > and added your Signed-off-by to the patch. > You can remove the PCI entries I've seen on your git tree. NAS 4220 has no PCI interface Greetings Hans Ulli Kroll
On Wed, Feb 8, 2017 at 1:55 PM, Hans Ulli Kroll <ulli.kroll@googlemail.com> wrote: > On Tue, 7 Feb 2017, Linus Walleij wrote: > >> On Sun, Feb 5, 2017 at 10:53 AM, Hans Ulli Kroll >> <ulli.kroll@googlemail.com> wrote: >> >> > Hi Linus, >> > >> > please add right baudrate and partition scheme for NAS 4220 >> > >> > Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> >> >> Thanks Hans! I folded this into the NAS 4220 device tree >> and added your Signed-off-by to the patch. >> > > You can remove the PCI entries I've seen on your git tree. > NAS 4220 has no PCI interface OK! I just assumed it was on that machine since you were commenting on the driver, I cut it now. Yours, Linus Walleij
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 10edd72a6f3d..fb141e11f8ed 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -169,6 +169,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \ exynos5440-ssdk5440.dtb \ exynos5800-peach-pi.dtb dtb-$(CONFIG_ARCH_GEMINI) += \ + gemini-nas4220b.dtb \ gemini-sq201.dtb dtb-$(CONFIG_ARCH_HI3xxx) += \ hi3620-hi4511.dtb diff --git a/arch/arm/boot/dts/gemini-nas4220b.dts b/arch/arm/boot/dts/gemini-nas4220b.dts new file mode 100644 index 000000000000..bf12638abb45 --- /dev/null +++ b/arch/arm/boot/dts/gemini-nas4220b.dts @@ -0,0 +1,68 @@ +/* + * Device Tree file for the Gemini-based Raidsonic NAS IB-4220-B + */ + +/dts-v1/; + +#include "gemini.dtsi" +#include <dt-bindings/input/input.h> + +/ { + model = "Raidsonic NAS IB-4220-B"; + compatible = "raidsonic,ib-4220-b", "cortina,gemini"; + #address-cells = <1>; + #size-cells = <1>; + + memory { /* 128 MB */ + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + button@29 { + debounce_interval = <50>; + wakeup-source; + linux,code = <KEY_SETUP>; + label = "Backup button"; + gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; + }; + button@31 { + debounce_interval = <50>; + wakeup-source; + linux,code = <KEY_RESTART>; + label = "Softreset button"; + gpios = <&gpio1 31 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + led@28 { + label = "nas4220b:orange:hdd"; + gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + led@30 { + label = "nas4220b:green:os"; + gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + }; + }; + + flash@30000000 { + status = "okay"; + /* 16MB of flash */ + reg = <0x30000000 0x01000000>; + /* TODO: add flash partitions here */ + }; +};
This devicetree is simply based on the board file in arch/arm/mach-gemini/board-nas4220b.c and contain the equivalent platform data, mainly just moving the GPIOs from the global numberspace to explicitly reference &gpio1. Cc: Janos Laube <janos.dev@gmail.com> Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/gemini-nas4220b.dts | 68 +++++++++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+) create mode 100644 arch/arm/boot/dts/gemini-nas4220b.dts -- 2.9.3