| Message ID | 1487756301-15646-3-git-send-email-ard.biesheuvel@linaro.org |
|---|---|
| State | Accepted |
| Commit | de2a78247a2955e20a014fd8c47eb9792d1b437b |
| Headers | show |
| Series | AARCH64: enable stack alignment check | expand |
On 22 February 2017 at 09:38, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote: > Stack and unstack the frame pointer according to the AAPCS in > AArch64AllDataCachesOperation (). > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > --- > ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > index 5cee7c1519c3..c35c05fdf681 100644 > --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > @@ -273,7 +273,7 @@ ASM_FUNC(ArmDisableBranchPrediction) > ASM_FUNC(AArch64AllDataCachesOperation) > // We can use regs 0-7 and 9-15 without having to save/restore. > // Save our link register on the stack. - The stack must always be quad-word aligned > - str x30, [sp, #-16]! > + stp x29, x30, [sp, #-16]! As discussed over IRC, this needs mov x29, sp appended as well. This ensures that this function will show up in a backtrace when an exception is taken (and not handled) in the callback invoked by this function. Without setting (and preserving) x29, it will still point to the caller of AArch64AllDataCachesOperation() > mov x1, x0 // Save Function call in x1 > mrs x6, clidr_el1 // Read EL1 CLIDR > and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC) > @@ -324,7 +324,7 @@ L_Skip: > L_Finished: > dsb sy > isb > - ldr x30, [sp], #0x10 > + ldp x29, x30, [sp], #0x10 > ret > > > -- > 2.7.4 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On Wed, Feb 22, 2017 at 12:56:04PM +0000, Ard Biesheuvel wrote: > On 22 February 2017 at 09:38, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote: > > Stack and unstack the frame pointer according to the AAPCS in > > AArch64AllDataCachesOperation (). > > > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > > --- > > ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > > index 5cee7c1519c3..c35c05fdf681 100644 > > --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > > +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > > @@ -273,7 +273,7 @@ ASM_FUNC(ArmDisableBranchPrediction) > > ASM_FUNC(AArch64AllDataCachesOperation) > > // We can use regs 0-7 and 9-15 without having to save/restore. > > // Save our link register on the stack. - The stack must always be quad-word aligned > > - str x30, [sp, #-16]! > > + stp x29, x30, [sp, #-16]! > > As discussed over IRC, this needs > > mov x29, sp > > appended as well. > > This ensures that this function will show up in a backtrace when an > exception is taken (and not handled) in the callback invoked by this > function. Without setting (and preserving) x29, it will still point to > the caller of AArch64AllDataCachesOperation() Sounds good. With that addition: Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> > > mov x1, x0 // Save Function call in x1 > > mrs x6, clidr_el1 // Read EL1 CLIDR > > and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC) > > @@ -324,7 +324,7 @@ L_Skip: > > L_Finished: > > dsb sy > > isb > > - ldr x30, [sp], #0x10 > > + ldp x29, x30, [sp], #0x10 > > ret > > > > > > -- > > 2.7.4 > > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S index 5cee7c1519c3..c35c05fdf681 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -273,7 +273,7 @@ ASM_FUNC(ArmDisableBranchPrediction) ASM_FUNC(AArch64AllDataCachesOperation) // We can use regs 0-7 and 9-15 without having to save/restore. // Save our link register on the stack. - The stack must always be quad-word aligned - str x30, [sp, #-16]! + stp x29, x30, [sp, #-16]! mov x1, x0 // Save Function call in x1 mrs x6, clidr_el1 // Read EL1 CLIDR and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC) @@ -324,7 +324,7 @@ L_Skip: L_Finished: dsb sy isb - ldr x30, [sp], #0x10 + ldp x29, x30, [sp], #0x10 ret
Stack and unstack the frame pointer according to the AAPCS in AArch64AllDataCachesOperation (). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel