diff mbox series

[Linaro-uefi,v2,1/4] Platforms/AMD/Styx/PlatformSmbiosDxe: don't write to string literals

Message ID 1488294680-1884-2-git-send-email-ard.biesheuvel@linaro.org
State Accepted
Commit e5a50c8068eff77241ece0382b48590aa985b51d
Headers show
Series AMD/Styx: enable strict memory permissions | expand

Commit Message

Ard Biesheuvel Feb. 28, 2017, 3:11 p.m. UTC 
Remove the code from PlatformSmbiosDxe that writes to a string literal
to turn the string 'L# Cache' into L1/L2/L3, and just emit the three
versions instead. This is necessary given that string literals are
emitted into .rodata by default, which makes them read-only when strict
memory permissions are in effect.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

Comments

Leif Lindholm March 7, 2017, 4:23 p.m. UTC | #1 
On Tue, Feb 28, 2017 at 03:11:17PM +0000, Ard Biesheuvel wrote:
> Remove the code from PlatformSmbiosDxe that writes to a string literal
> to turn the string 'L# Cache' into L1/L2/L3, and just emit the three
> versions instead. This is necessary given that string literals are
> emitted into .rodata by default, which makes them read-only when strict
> memory permissions are in effect.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 13 +++----------
>  1 file changed, 3 insertions(+), 10 deletions(-)
> 
> diff --git a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c
> index 5ee5d92fdf9c..7548be727849 100644
> --- a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c
> +++ b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c
> @@ -354,17 +354,10 @@ SMBIOS_TABLE_TYPE7  mCacheInfoType7 = {
>    CacheTypeUnknown,                     // System Cache Type
>    CacheAssociativity2Way        // Associativity
>  };
> -#if (FixedPcdGetBool (PcdIscpSupport))
> -CHAR8  *mCacheInfoType7Strings[] = {
> -  "L# Cache",
> -  NULL
> -};
> -#else
>  CHAR8  *mCacheInfoType7Strings[] = {
>    "Cache1",
>    NULL
>  };
> -#endif
>  
>  /***********************************************************************
>          SMBIOS data definition  TYPE9  System Slot Information
> @@ -710,7 +703,7 @@ CacheInfoUpdateSmbiosType7 (
>    dstType7.SocketDesignation = 1;  // "L# Cache"
>  
>    // L1 cache settings
> -  mCacheInfoType7Strings[0][1] = '1'; // "L# Cache" --> "L1 Cache"
> +  mCacheInfoType7Strings[0] = "L1 Cache";
>    SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L1[0];
>    dstType7.CacheConfiguration  = SmbiosT7->T7CacheCfg;
>    dstType7.MaximumCacheSize    = SmbiosT7->T7MaxCacheSize;
> @@ -726,7 +719,7 @@ CacheInfoUpdateSmbiosType7 (
>    LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings);
>  
>    // L2 cache settings
> -  mCacheInfoType7Strings[0][1] = '2'; // "L# Cache" --> "L2 Cache"
> +  mCacheInfoType7Strings[0] = "L2 Cache";
>    SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L2[0];
>    dstType7.CacheConfiguration  = SmbiosT7->T7CacheCfg;
>    dstType7.MaximumCacheSize    = SmbiosT7->T7MaxCacheSize;
> @@ -742,7 +735,7 @@ CacheInfoUpdateSmbiosType7 (
>    LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings);
>  
>    // L3 cache settings
> -  mCacheInfoType7Strings[0][1] = '3'; // "L# Cache" --> "L3 Cache"
> +  mCacheInfoType7Strings[0] = "L3 Cache";
>    SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L3[0];
>    dstType7.CacheConfiguration  = SmbiosT7->T7CacheCfg;
>    dstType7.MaximumCacheSize    = SmbiosT7->T7MaxCacheSize;
> -- 
> 2.7.4
>
diff mbox series

Patch

diff --git a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c
index 5ee5d92fdf9c..7548be727849 100644
--- a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c
+++ b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c
@@ -354,17 +354,10 @@  SMBIOS_TABLE_TYPE7  mCacheInfoType7 = {
   CacheTypeUnknown,                     // System Cache Type
   CacheAssociativity2Way        // Associativity
 };
-#if (FixedPcdGetBool (PcdIscpSupport))
-CHAR8  *mCacheInfoType7Strings[] = {
-  "L# Cache",
-  NULL
-};
-#else
 CHAR8  *mCacheInfoType7Strings[] = {
   "Cache1",
   NULL
 };
-#endif
 
 /***********************************************************************
         SMBIOS data definition  TYPE9  System Slot Information
@@ -710,7 +703,7 @@  CacheInfoUpdateSmbiosType7 (
   dstType7.SocketDesignation = 1;  // "L# Cache"
 
   // L1 cache settings
-  mCacheInfoType7Strings[0][1] = '1'; // "L# Cache" --> "L1 Cache"
+  mCacheInfoType7Strings[0] = "L1 Cache";
   SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L1[0];
   dstType7.CacheConfiguration  = SmbiosT7->T7CacheCfg;
   dstType7.MaximumCacheSize    = SmbiosT7->T7MaxCacheSize;
@@ -726,7 +719,7 @@  CacheInfoUpdateSmbiosType7 (
   LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings);
 
   // L2 cache settings
-  mCacheInfoType7Strings[0][1] = '2'; // "L# Cache" --> "L2 Cache"
+  mCacheInfoType7Strings[0] = "L2 Cache";
   SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L2[0];
   dstType7.CacheConfiguration  = SmbiosT7->T7CacheCfg;
   dstType7.MaximumCacheSize    = SmbiosT7->T7MaxCacheSize;
@@ -742,7 +735,7 @@  CacheInfoUpdateSmbiosType7 (
   LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings);
 
   // L3 cache settings
-  mCacheInfoType7Strings[0][1] = '3'; // "L# Cache" --> "L3 Cache"
+  mCacheInfoType7Strings[0] = "L3 Cache";
   SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L3[0];
   dstType7.CacheConfiguration  = SmbiosT7->T7CacheCfg;
   dstType7.MaximumCacheSize    = SmbiosT7->T7MaxCacheSize;