From patchwork Wed Apr 5 10:31:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Amit Pundir X-Patchwork-Id: 96807 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp195795qgd; Wed, 5 Apr 2017 03:32:50 -0700 (PDT) X-Received: by 10.99.95.77 with SMTP id t74mr29395518pgb.203.1491388370588; Wed, 05 Apr 2017 03:32:50 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i62si20247750pli.318.2017.04.05.03.32.50; Wed, 05 Apr 2017 03:32:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932269AbdDEKcr (ORCPT + 6 others); Wed, 5 Apr 2017 06:32:47 -0400 Received: from mail-pf0-f172.google.com ([209.85.192.172]:33072 "EHLO mail-pf0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933409AbdDEKcb (ORCPT ); Wed, 5 Apr 2017 06:32:31 -0400 Received: by mail-pf0-f172.google.com with SMTP id s16so5597158pfs.0 for ; Wed, 05 Apr 2017 03:32:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Cg3yR7bGqv3Lnjpf7dVccuebwulzk+7RQuTL0CiOhJA=; b=ECswQtoKMYWpSC/EsmlHK6a1XHewz3Zj7CDJG2d/9O1IE8S3GUzQhf5MCeDHpjcgd7 AnRn+/F1YLat9F2/p5TfS30qbWW1gkqxopQi91mPuf30OpABYw6k1OdY2gCmzKGHsx4/ lOxeDV/8vSeQluspmZkB+mU0C7m01juR3zh5o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Cg3yR7bGqv3Lnjpf7dVccuebwulzk+7RQuTL0CiOhJA=; b=qFLZLo61y4KdLKIzFW7SDTW/6QnvUISDd2uKtInkYvz89e2AXwcL1eC9C3nZi50Qej NXJV/kUrdDgwSuhyrwCfK7Ku54zLDdNbisaGi4aFQ++nRHSaltmYzQNtFrqEQtB6CiKa cA/DQOM+68SmVporH2YW5SJuqnh1j65EB0CpycDTcd6JZbfkcHUHIo+6c2PIvjaf+CQY ZTngzEmneJ/tbqtvZpKVVV9wX7/YFmb5h/aN39ogloK2lb8bZuxCusGAkIKvD2NdFDhP Qq5Ss/pfIK/lq8LLXMVOGMLRiY15j5s38PHWChC5qhgxZIgWd+0z3pxRTCAk8yhjKOny SI8A== X-Gm-Message-State: AFeK/H0exTIan4BOEw+ols8NzYHi3zKhvo8SkJ8qPxqQdhfeKCAmiOrg+SRy/TqRp/sQYW3Z X-Received: by 10.84.198.164 with SMTP id p33mr35963548pld.127.1491388350266; Wed, 05 Apr 2017 03:32:30 -0700 (PDT) Received: from localhost.localdomain ([106.51.240.246]) by smtp.gmail.com with ESMTPSA id a62sm36732075pgc.60.2017.04.05.03.32.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 05 Apr 2017 03:32:29 -0700 (PDT) From: Amit Pundir To: stable@vger.kernel.org Cc: gregkh@linuxfoundation.org, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Florian Fainelli Subject: [PATCH v2 for-4.9 01/32] ARM: BCM5301X: Add back handler ignoring external imprecise aborts Date: Wed, 5 Apr 2017 16:01:53 +0530 Message-Id: <1491388344-13521-2-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491388344-13521-1-git-send-email-amit.pundir@linaro.org> References: <1491388344-13521-1-git-send-email-amit.pundir@linaro.org> MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Rafał Miłecki Since early BCM5301X days we got abort handler that was removed by commit 937b12306ea79 ("ARM: BCM5301X: remove workaround imprecise abort fault handler"). It assumed we need to deal only with pending aborts left by the bootloader. Unfortunately this isn't true for BCM5301X. When probing PCI config space (device enumeration) it is expected to have master aborts on the PCI bus. Most bridges don't forward (or they allow disabling it) these errors onto the AXI/AMBA bus but not the Northstar (BCM5301X) one. iProc PCIe controller on Northstar seems to be some older one, without a control register for errors forwarding. It means we need to workaround this at platform level. All newer platforms are not affected by this issue. Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli (cherry picked from commit 09f3510fb70a46c8921f2cf4a90dbcae460a6820) Signed-off-by: Amit Pundir --- arch/arm/mach-bcm/bcm_5301x.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) -- 2.7.4 diff --git a/arch/arm/mach-bcm/bcm_5301x.c b/arch/arm/mach-bcm/bcm_5301x.c index c8830a2..fe067f6 100644 --- a/arch/arm/mach-bcm/bcm_5301x.c +++ b/arch/arm/mach-bcm/bcm_5301x.c @@ -9,14 +9,42 @@ #include #include +#include +#include + +#define FSR_EXTERNAL (1 << 12) +#define FSR_READ (0 << 10) +#define FSR_IMPRECISE 0x0406 static const char *const bcm5301x_dt_compat[] __initconst = { "brcm,bcm4708", NULL, }; +static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr, + struct pt_regs *regs) +{ + /* + * We want to ignore aborts forwarded from the PCIe bus that are + * expected and shouldn't really be passed by the PCIe controller. + * The biggest disadvantage is the same FSR code may be reported when + * reading non-existing APB register and we shouldn't ignore that. + */ + if (fsr == (FSR_EXTERNAL | FSR_READ | FSR_IMPRECISE)) + return 0; + + return 1; +} + +static void __init bcm5301x_init_early(void) +{ + hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR, + "imprecise external abort"); +} + DT_MACHINE_START(BCM5301X, "BCM5301X") .l2c_aux_val = 0, .l2c_aux_mask = ~0, .dt_compat = bcm5301x_dt_compat, + .init_early = bcm5301x_init_early, MACHINE_END