GIT binary patch
delta 1674
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delta 1741
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@@ -261,11 +261,21 @@
bus-range = <0x0 0x7f>;
msi-parent = <0x4>;
reg = <0x0 0xf0000000 0x0 0x10000000>;
- interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
- interrupt-map = <0x1000 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x120 0x1>,
- <0x1000 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x121 0x1>,
- <0x1000 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x122 0x1>,
- <0x1000 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x123 0x1>;
+ interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
+ interrupt-map = <0x1100 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x120 0x1>,
+ <0x1100 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x121 0x1>,
+ <0x1100 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x122 0x1>,
+ <0x1100 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x123 0x1>,
+
+ <0x1200 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x124 0x1>,
+ <0x1200 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x125 0x1>,
+ <0x1200 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x126 0x1>,
+ <0x1200 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x127 0x1>,
+
+ <0x1300 0x0 0x0 0x1 0x1 0x0 0x0 0x0 0x128 0x1>,
+ <0x1300 0x0 0x0 0x2 0x1 0x0 0x0 0x0 0x129 0x1>,
+ <0x1300 0x0 0x0 0x3 0x1 0x0 0x0 0x0 0x12a 0x1>,
+ <0x1300 0x0 0x0 0x4 0x1 0x0 0x0 0x0 0x12b 0x1>;
dma-coherent;
dma-ranges = <0x43000000 0x0 0x0 0x0 0x0 0x100 0x0>;
ranges = <0x1000000 0x0 0x00000000 0x0 0xefff0000 0x00 0x00010000>, /* I/O Memory (size=64K) */
The interrupt map in the PCIe node describes something that resembles the legacy interrupt routing of the first slot only, but applies it to all PCI-PCI bridges, which means the wrong interrupt is reported for devices in slots 2 and 3. Since most devices support MSI, this is not actually a big deal, but it would be nice to fix this nonetheless. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dtb | Bin 7973 -> 8123 bytes Platforms/AMD/Styx/OverdriveBoard/FdtBlob/styx-overdrive.dts | 20 +++++++++++++++----- 2 files changed, 15 insertions(+), 5 deletions(-)