[Linaro-uefi,3/3] D05: Support ipmi through LPC

Message ID	1494919879-72821-3-git-send-email-chenhui.sun@linaro.org
State	Superseded
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; From: Chenhui Sun <chenhui.sun@linaro.org> To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Tue, 16 May 2017 15:31:19 +0800 Message-Id: <1494919879-72821-3-git-send-email-chenhui.sun@linaro.org> In-Reply-To: <1494919879-72821-1-git-send-email-chenhui.sun@linaro.org> References: <1494919879-72821-1-git-send-email-chenhui.sun@linaro.org> Cc: Yi Li <Phoenix.liyi@huawei.com>, "zhichang.yuan" <yuanzhichang@hisilicon.com>, Heyi Guo <guoheyi@huawei.com>, sunchenhui@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH 3/3] D05: Support ipmi through LPC Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" <linaro-uefi-bounces@lists.linaro.org>
Series	[Linaro-uefi,1/3] Hisilicon D03/D05: set boot option by BMC \| expand [Linaro-uefi,1/3] Hisilicon D03/D05: set boot option by BMC [Linaro-uefi,2/3] D03: Support ipmi through LPC [Linaro-uefi,3/3] D05: Support ipmi through LPC

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1494919879-72821-3-git-send-email-chenhui.sun@linaro.org

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Received-SPF: pass (google.com: domain of
	linaro-uefi-bounces@lists.linaro.org designates
	54.225.227.206 as permitted sender) client-ip=54.225.227.206; 
From: Chenhui Sun <chenhui.sun@linaro.org>
To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org,
	graeme.gregory@linaro.org
Date: Tue, 16 May 2017 15:31:19 +0800
Message-Id: <1494919879-72821-3-git-send-email-chenhui.sun@linaro.org>
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References: <1494919879-72821-1-git-send-email-chenhui.sun@linaro.org>
Cc: Yi Li <Phoenix.liyi@huawei.com>,
	"zhichang.yuan" <yuanzhichang@hisilicon.com>,
	Heyi Guo <guoheyi@huawei.com>, 
	sunchenhui@huawei.com, wanghuiqiang@huawei.com
Subject: [Linaro-uefi] [PATCH 3/3] D05: Support ipmi through LPC
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Series

[Linaro-uefi,1/3] Hisilicon D03/D05: set boot option by BMC | expand

Commit Message

Chenhui Sun May 16, 2017, 7:31 a.m. UTC

From: "zhichang.yuan" <yuanzhichang@hisilicon.com>

Add ipmi description according to the new LPC driver of
Linux kernel 4.10

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zhichang.yuan <yuanzhichang@hisilicon.com>
Signed-off-by: Heyi Guo <guoheyi@huawei.com>
Signed-off-by: Yi Li <Phoenix.liyi@huawei.com>
Signed-off-by: Chenhui Sun <sunchenhui@huawei.com>
---
 Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Lpc.asl | 91 +++++++++++++++++++++--
 1 file changed, 85 insertions(+), 6 deletions(-)

Comments

Graeme Gregory May 16, 2017, 10:47 a.m. UTC | #1

On Tue, May 16, 2017 at 03:31:19PM +0800, Chenhui Sun wrote:
> From: "zhichang.yuan" <yuanzhichang@hisilicon.com>
> 
> Add ipmi description according to the new LPC driver of
> Linux kernel 4.10
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: zhichang.yuan <yuanzhichang@hisilicon.com>
> Signed-off-by: Heyi Guo <guoheyi@huawei.com>
> Signed-off-by: Yi Li <Phoenix.liyi@huawei.com>
> Signed-off-by: Chenhui Sun <sunchenhui@huawei.com>
The ACPI in this patch seems fine

Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>

> ---
>  Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Lpc.asl | 91 +++++++++++++++++++++--
>  1 file changed, 85 insertions(+), 6 deletions(-)
> 
> diff --git a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Lpc.asl b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Lpc.asl
> index 0965afc..d4b2372 100644
> --- a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Lpc.asl
> +++ b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Lpc.asl
> @@ -16,10 +16,89 @@
>  // LPC
>  //
>  
> -Device (LPC0)
> -{
> -  Name(_HID, "HISI0191")  // HiSi LPC
> -  Name (_CRS, ResourceTemplate () {
> -    Memory32Fixed (ReadWrite, 0xa01b0000, 0x1000)
> -  })
> +Scope(_SB) {
> +  Device (LPC0) {
> +    Name (_HID, "HISI0191")  // HiSi LPC
> +    Name (_CRS, ResourceTemplate () {
> +      Memory32Fixed (ReadWrite, 0xa01b0000, 0x1000)
> +    })
> +  }
> +
> +  Device (LPC0.IPMI) {
> +    Name (_HID, "IPI0001")
> +    Method (_IFT) {
> +      Return (0x03)
> +    }
> +    Name (LORS, ResourceTemplate() {
> +      QWordIO (
> +        ResourceConsumer,
> +        MinNotFixed,     // _MIF
> +        MaxNotFixed,     // _MAF
> +        PosDecode,
> +        EntireRange,
> +        0x0,             // _GRA
> +        0xe4,            // _MIN
> +        0x3fff,          // _MAX
> +        0x0,             // _TRA
> +        0x04,            // _LEN
> +        , ,
> +        BTIO
> +      )
> +    })
> +    CreateQWordField (LORS, BTIO._MIN, CMIN)
> +    CreateQWordField (LORS, BTIO._MAX, CMAX)
> +    CreateQWordField (LORS, BTIO._LEN, CLEN)
> +
> +    Method (_PRS, 0) {
> +      Return (LORS)
> +    }
> +
> +    Method (_CRS, 0) {
> +      Return (LORS)
> +    }
> +    Method (_SRS, 1) {
> +      CreateQWordField (Arg0, \_SB.LPC0.IPMI.BTIO._MIN, IMIN)
> +      Store (IMIN, CMIN)
> +      CreateQWordField (Arg0, \_SB.LPC0.IPMI.BTIO._MAX, IMAX)
> +      Store (IMAX, CMAX)
> +    }
> +  }
> +
> +  Device (LPC0.CON0) {
> +    Name (_HID, "HISI1031")
> +    Name (_CID, "PNP0501")
> +    Name (LORS, ResourceTemplate() {
> +      QWordIO (
> +        ResourceConsumer,
> +        MinNotFixed,     // _MIF
> +        MaxNotFixed,     // _MAF
> +        PosDecode,
> +        EntireRange,
> +        0x0,             // _GRA
> +        0x2F8,           // _MIN
> +        0x3fff,          // _MAX
> +        0x0,             // _TRA
> +        0x08,            // _LEN
> +        , ,
> +        IO02
> +      )
> +    })
> +    CreateQWordField (LORS, IO02._MIN, CMIN)
> +    CreateQWordField (LORS, IO02._MAX, CMAX)
> +    CreateQWordField (LORS, IO02._LEN, CLEN)
> +
> +    Method (_PRS, 0) {
> +      Return (LORS)
> +    }
> +
> +    Method (_CRS, 0) {
> +      Return (LORS)
> +    }
> +    Method (_SRS, 1) {
> +      CreateQWordField (Arg0, \_SB.LPC0.CON0.IO02._MIN, IMIN)
> +      Store (IMIN, CMIN)
> +      CreateQWordField (Arg0, \_SB.LPC0.CON0.IO02._MAX, IMAX)
> +      Store (IMAX, CMAX)
> +    }
> +  }
>  }
> -- 
> 1.9.1
>

diff --git a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Lpc.asl b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Lpc.asl
index 0965afc..d4b2372 100644
--- a/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Lpc.asl
+++ b/Chips/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Lpc.asl
@@ -16,10 +16,89 @@ 
 // LPC
 //
 
-Device (LPC0)
-{
-  Name(_HID, "HISI0191")  // HiSi LPC
-  Name (_CRS, ResourceTemplate () {
-    Memory32Fixed (ReadWrite, 0xa01b0000, 0x1000)
-  })
+Scope(_SB) {
+  Device (LPC0) {
+    Name (_HID, "HISI0191")  // HiSi LPC
+    Name (_CRS, ResourceTemplate () {
+      Memory32Fixed (ReadWrite, 0xa01b0000, 0x1000)
+    })
+  }
+
+  Device (LPC0.IPMI) {
+    Name (_HID, "IPI0001")
+    Method (_IFT) {
+      Return (0x03)
+    }
+    Name (LORS, ResourceTemplate() {
+      QWordIO (
+        ResourceConsumer,
+        MinNotFixed,     // _MIF
+        MaxNotFixed,     // _MAF
+        PosDecode,
+        EntireRange,
+        0x0,             // _GRA
+        0xe4,            // _MIN
+        0x3fff,          // _MAX
+        0x0,             // _TRA
+        0x04,            // _LEN
+        , ,
+        BTIO
+      )
+    })
+    CreateQWordField (LORS, BTIO._MIN, CMIN)
+    CreateQWordField (LORS, BTIO._MAX, CMAX)
+    CreateQWordField (LORS, BTIO._LEN, CLEN)
+
+    Method (_PRS, 0) {
+      Return (LORS)
+    }
+
+    Method (_CRS, 0) {
+      Return (LORS)
+    }
+    Method (_SRS, 1) {
+      CreateQWordField (Arg0, \_SB.LPC0.IPMI.BTIO._MIN, IMIN)
+      Store (IMIN, CMIN)
+      CreateQWordField (Arg0, \_SB.LPC0.IPMI.BTIO._MAX, IMAX)
+      Store (IMAX, CMAX)
+    }
+  }
+
+  Device (LPC0.CON0) {
+    Name (_HID, "HISI1031")
+    Name (_CID, "PNP0501")
+    Name (LORS, ResourceTemplate() {
+      QWordIO (
+        ResourceConsumer,
+        MinNotFixed,     // _MIF
+        MaxNotFixed,     // _MAF
+        PosDecode,
+        EntireRange,
+        0x0,             // _GRA
+        0x2F8,           // _MIN
+        0x3fff,          // _MAX
+        0x0,             // _TRA
+        0x08,            // _LEN
+        , ,
+        IO02
+      )
+    })
+    CreateQWordField (LORS, IO02._MIN, CMIN)
+    CreateQWordField (LORS, IO02._MAX, CMAX)
+    CreateQWordField (LORS, IO02._LEN, CLEN)
+
+    Method (_PRS, 0) {
+      Return (LORS)
+    }
+
+    Method (_CRS, 0) {
+      Return (LORS)
+    }
+    Method (_SRS, 1) {
+      CreateQWordField (Arg0, \_SB.LPC0.CON0.IO02._MIN, IMIN)
+      Store (IMIN, CMIN)
+      CreateQWordField (Arg0, \_SB.LPC0.CON0.IO02._MAX, IMAX)
+      Store (IMAX, CMAX)
+    }
+  }
 }

[Linaro-uefi,3/3] D05: Support ipmi through LPC

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