diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
index 13ddbabe2a11..345f04a25e3e 100644
--- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
+++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc
@@ -21,10 +21,6 @@ DEFINE NUM_CORES = 8
 DEFINE DO_KCS    = 0
 DEFINE DO_RTK    = 0
 
-DEFINE EL3_TO_EL1 = 0x3C5
-DEFINE EL3_TO_EL2 = 0x3C9
-DEFINE TRANS_CODE = $(EL3_TO_EL2)
-
   PLATFORM_NAME                  = Cello
   PLATFORM_GUID                  = 77861b3e-74b0-4ff3-8d18-c5ba5803e1bf
   PLATFORM_VERSION               = 0.1
@@ -94,7 +90,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
   # ARM Architectural Libraries
   CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
   DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
-# CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
   CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
   ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
   DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
@@ -284,20 +279,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
   gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE
   gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE
   gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE
-  gArmPlatformTokenSpaceGuid.PcdBdsLinuxSupport|FALSE
   
-  #
-  # Control what commands are supported from the UI
-  # Turn these on and off to add features or save size
-  #  
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedMacBoot|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedDirCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedHobCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedHwDebugCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedPciDebugCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedIoEnable|FALSE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedScriptCmd|FALSE
-
   # All pages are cached by default
   gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
   
@@ -356,10 +338,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
 
   gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
 
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000
-  
   #
   # Optional feature to help prevent EFI memory map fragments
   # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
@@ -380,38 +358,20 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
   gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
   gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
     
-  #
-  # ARM Pcds
-  #
-  gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000000000000
-
   gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
   gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
   gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
 
-  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"AMD Seattle"
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"Seattle"
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"AMD Seattle"
 
   # Number of configured cores
   gArmPlatformTokenSpaceGuid.PcdCoreCount|$(NUM_CORES)
 
-  # Enable floating point
-  gArmTokenSpaceGuid.PcdVFPEnabled|1
-
   # Stacks for MPCores in Normal World
   gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x8001680000
   gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800
 
-  # Stacks for MPCores in Monitor Mode
-  gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x8001688000
-  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x100
-
-  # Stacks for MPCores in Secure World
-  gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x8001689000
-  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000
-  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x800
-
   # Declare system memory base
   gArmTokenSpaceGuid.PcdSystemMemoryBase|0x8000000000
 
@@ -419,21 +379,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
   gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
 
   #
-  # ARM Pcds
-  #
-  gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
-
-  # Trustzone enable
-  # (to make the transition from EL3 to EL2 in ArmPlatformPkg/Sec)
-  gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE
-
-  # Secure Configuration Register
-  gArmTokenSpaceGuid.PcdArmScr|0x531
-
-  # EL Transition Code 
-  gArmTokenSpaceGuid.PcdArmNonSecModeTransition|$(TRANS_CODE)
- 
-  #
   # ARM PrimeCell
   #
 
@@ -484,9 +429,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
   gArmTokenSpaceGuid.PcdPciMmio64Size|0x7F00000000
   gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0
 
-  ## Use PCI emulation for ATA PassThru
-  # gEfiMdeModulePkgTokenSpaceGuid.PcdAtaPassThruPciEmulation|TRUE
-
   ## ACPI (no tables < 4GB)
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
 
diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
index 5a6f74f48162..b5069b073d45 100644
--- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
+++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc
@@ -24,10 +24,6 @@ DEFINE DO_ISCP      = 1
 DEFINE DO_KCS       = 1
 DEFINE DO_RTK       = 0
 
-DEFINE EL3_TO_EL1 = 0x3C5
-DEFINE EL3_TO_EL2 = 0x3C9
-DEFINE TRANS_CODE = $(EL3_TO_EL2)
-
   PLATFORM_NAME                  = Overdrive
   PLATFORM_GUID                  = B2296C02-9DA1-4CD1-BD48-4D4F0F1276EB
   PLATFORM_VERSION               = 0.1
@@ -97,7 +93,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
   # ARM Architectural Libraries
   CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
   DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
-# CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
   CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf
   ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf
   DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf
@@ -291,20 +286,7 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
   gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE
   gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE
   gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE
-  gArmPlatformTokenSpaceGuid.PcdBdsLinuxSupport|FALSE
   
-  #
-  # Control what commands are supported from the UI
-  # Turn these on and off to add features or save size
-  #  
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedMacBoot|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedDirCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedHobCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedHwDebugCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedPciDebugCmd|TRUE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedIoEnable|FALSE
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedScriptCmd|FALSE
-
   # All pages are cached by default
   gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE
   
@@ -363,10 +345,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
 
   gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
 
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|""
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000
-  
   #
   # Optional feature to help prevent EFI memory map fragments
   # Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob
@@ -387,38 +365,20 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
   gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderCode|20
   gEmbeddedTokenSpaceGuid.PcdMemoryTypeEfiLoaderData|0
     
-  #
-  # ARM Pcds
-  #
-  gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000000000000
-
   gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
   gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
   gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
 
-  gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"AMD Seattle"
-  gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"Seattle"
+  gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVendor|L"AMD Seattle"
 
   # Number of configured cores
   gArmPlatformTokenSpaceGuid.PcdCoreCount|$(NUM_CORES)
 
-  # Enable floating point
-  gArmTokenSpaceGuid.PcdVFPEnabled|1
-
   # Stacks for MPCores in Normal World
   gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x8001680000
   gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
   gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x800
 
-  # Stacks for MPCores in Monitor Mode
-  gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x8001688000
-  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x100
-
-  # Stacks for MPCores in Secure World
-  gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x8001689000
-  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000
-  gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x800
-
   # Declare system memory base
   gArmTokenSpaceGuid.PcdSystemMemoryBase|0x8000000000
 
@@ -426,21 +386,6 @@ DEFINE TRANS_CODE = $(EL3_TO_EL2)
   gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
 
   #
-  # ARM Pcds
-  #
-  gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
-
-  # Trustzone enable
-  # (to make the transition from EL3 to EL2 in ArmPlatformPkg/Sec)
-  gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE
-
-  # Secure Configuration Register
-  gArmTokenSpaceGuid.PcdArmScr|0x531
-
-  # EL Transition Code 
-  gArmTokenSpaceGuid.PcdArmNonSecModeTransition|$(TRANS_CODE)
- 
-  #
   # ARM PrimeCell
   #
 
