From patchwork Tue Dec 6 10:56:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 86772 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp1960434qgi; Tue, 6 Dec 2016 03:17:12 -0800 (PST) X-Received: by 10.200.38.72 with SMTP id v8mr62224515qtv.292.1481023032147; Tue, 06 Dec 2016 03:17:12 -0800 (PST) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id 127si11416030qkk.40.2016.12.06.03.17.11; Tue, 06 Dec 2016 03:17:12 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id BBAD360B51; Tue, 6 Dec 2016 11:17:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id C8CD760C20; Tue, 6 Dec 2016 11:04:33 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id EF6B260E32; Tue, 6 Dec 2016 11:04:11 +0000 (UTC) Received: from mail-pg0-f52.google.com (mail-pg0-f52.google.com [74.125.83.52]) by lists.linaro.org (Postfix) with ESMTPS id 1BD4E607CD for ; Tue, 6 Dec 2016 11:00:01 +0000 (UTC) Received: by mail-pg0-f52.google.com with SMTP id x23so148345181pgx.1 for ; Tue, 06 Dec 2016 03:00:01 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=p5/xLMkK2J45Ovq9+rYSA7hqJlowbLkn3ns9LHHZgjU=; b=dhLg7Sj5C5VmoZx8loWVDT3DeWd0Pny8t/Ea9lP7FBl5MZZd6quwUwbv9m4P7zX+Pd xexcOAKUodJtPoX2eCYT8iGMjzxMNrEMQfecVUzh6O+oH5L4Qot0ubRy4rVzhzn0JUGU dj4U/wIiFcDvXeH2sL4YRxXEghCcMqJniwVuwn7o6nuxfJ5s5k+ceZ1Tp2jvtj7f5NHP xC6noxU8H3K9d5Q6zAI9VSMIWvnlWptBZKZQDRbdZhulT2gAHzafZ/pfoQ3x4Q/1FK5a vogoDH8kfu/HDczIYyi/cdL34OOYlss93LGFxu805K1peUZs779+9UUoFvsVHMHbdOyz jR3Q== X-Gm-Message-State: AKaTC00X3cMVyMWnF4IhoOWgpiALUpMapXX9bKml2Ui6bKOrqhQ/KB8XNLu31Llr84VA24Stlv8= X-Received: by 10.84.169.36 with SMTP id g33mr136943344plb.174.1481022000447; Tue, 06 Dec 2016 03:00:00 -0800 (PST) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id x26sm6980952pge.24.2016.12.06.02.59.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 06 Dec 2016 03:00:00 -0800 (PST) From: Heyi Guo To: linaro-uefi@lists.linaro.org Date: Tue, 6 Dec 2016 18:56:59 +0800 Message-Id: <1481021828-59826-29-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1481021828-59826-1-git-send-email-heyi.guo@linaro.org> References: <1481021828-59826-1-git-send-email-heyi.guo@linaro.org> Cc: Kefeng Wang , sunchenhui@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v6 28/37] D03/USB: fix ehci interrupt pin number X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" The defination of OHCI and EHCI hardware pins are wrong, the OHCI pin number is 640, and the EHCI hardware pin number is 641, correct them. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Kefeng Wang Signed-off-by: Heyi Guo Reviewed-by: Graeme Gregory Reviewed-by: Leif Lindholm --- Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl | 2 +- Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Usb.asl | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl b/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl index afd6b47..7265ac8 100644 --- a/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl +++ b/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl @@ -23,7 +23,7 @@ Scope(_SB) }) Name(_PRS, ResourceTemplate() { - Interrupt(ResourceProducer, Edge, ActiveHigh, Exclusive, 0,,) {0x41, 0x42} + Interrupt(ResourceProducer, Edge, ActiveHigh, Exclusive, 0,,) {640, 641} //OHCI: 640, EHCI 641 }) Name(_DSD, Package () { diff --git a/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Usb.asl b/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Usb.asl index 8429a4b..9132965 100644 --- a/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Usb.asl +++ b/Chips/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Usb.asl @@ -34,7 +34,7 @@ Scope(_SB) ) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, 0, "\\_SB.MBI0") { - 0x00000041, + 641, //EHCI } }) Return (RBUF) /* \_SB_.USB0._CRS.RBUF */