diff --git a/Platform/Hisilicon/D06/D06.dsc b/Platform/Hisilicon/D06/D06.dsc
index d762230768e9..a3a01bfb1e23 100644
--- a/Platform/Hisilicon/D06/D06.dsc
+++ b/Platform/Hisilicon/D06/D06.dsc
@@ -63,8 +63,6 @@ [LibraryClasses.common]
 
   CpldIoLib|Silicon/Hisilicon/Library/CpldIoLib/CpldIoLib.inf
 
-  SerdesLib|Silicon/Hisilicon/Hi1620/Library/Hi1620Serdes/Hi1620SerdesLib.inf
-
   TimeBaseLib|EmbeddedPkg/Library/TimeBaseLib/TimeBaseLib.inf
   RealTimeClockLib|Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf
   OemMiscLib|Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf
diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
index 61cead7779b9..669e6a2d52cc 100644
--- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/SmbiosMiscDxe.inf
@@ -69,6 +69,7 @@ [LibraryClasses]
   BaseMemoryLib
   BaseLib
   DebugLib
+  OemMiscLib
   UefiBootServicesTableLib
   UefiRuntimeServicesTableLib
   UefiDriverEntryPoint
@@ -77,7 +78,6 @@ [LibraryClasses]
 
   IpmiCmdLib
 
-  SerdesLib
 
 [Protocols]
   gEfiSmbiosProtocolGuid                       # PROTOCOL ALWAYS_CONSUMED
diff --git a/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h b/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h
index 077dd5edc847..b493dd9ac090 100755
--- a/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h
+++ b/Silicon/Hisilicon/Hi1610/Include/Library/SerdesLib.h
@@ -16,116 +16,7 @@
 #ifndef _SERDES_LIB_H_
 #define _SERDES_LIB_H_
 
-typedef enum {
-  EmHilink0Hccs1X8 = 0,
-  EmHilink0Pcie1X8 = 2,
-  EmHilink0Pcie1X4Pcie2X4 = 3,
-  EmHilink0Sas2X8 = 4,
-  EmHilink0Hccs1X8Width16,
-  EmHilink0Hccs1X8Width32,
-} HILINK0_MODE_TYPE;
-
-typedef enum {
-  EmHilink1Sas2X1 = 0,
-  EmHilink1Hccs0X8 = 1,
-  EmHilink1Pcie0X8 = 2,
-  EmHilink1Hccs0X8Width16,
-  EmHilink1Hccs0X8Width32,
-} HILINK1_MODE_TYPE;
-
-typedef enum {
-  EmHilink2Pcie2X8 = 0,
-  EmHilink2Sas0X8 = 2,
-} HILINK2_MODE_TYPE;
-
-typedef enum {
-  EmHilink5Pcie3X4 = 0,
-  EmHilink5Pcie2X2Pcie3X2 = 1,
-  EmHilink5Sas1X4 = 2,
-} HILINK5_MODE_TYPE;
-
-typedef enum {
-  Em32coreEvbBoard = 0,
-  Em16coreEvbBoard = 1,
-  EmV2R1CO5Borad = 2,
-  EmOtherBorad
-} BOARD_TYPE;
-
-
-typedef struct {
-  HILINK0_MODE_TYPE Hilink0Mode;
-  HILINK1_MODE_TYPE Hilink1Mode;
-  HILINK2_MODE_TYPE Hilink2Mode;
-  UINT32 Hilink3Mode;
-  UINT32 Hilink4Mode;
-  HILINK5_MODE_TYPE Hilink5Mode;
-  UINT32 Hilink6Mode;
-  UINT32 UseSsc;
-} SERDES_PARAM;
-
-
-#define SERDES_INVALID_MACRO_ID  0xFFFFFFFF
-#define SERDES_INVALID_LANE_NUM  0xFFFFFFFF
-#define SERDES_INVALID_RATE_MODE  0xFFFFFFFF
-
-typedef struct {
-  UINT32 MacroId;
-  UINT32 DsNum;
-  UINT32 DsCfg;
-} SERDES_POLARITY_INVERT;
-
-EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId);
-extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[];
-extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[];
-UINT32 GetEthType(UINT8 EthChannel);
-
 EFI_STATUS
 EfiSerdesInitWrap (VOID);
 
-void SRE_SerdesEnableCTLEDFE(UINT32 macro, UINT32 lane, UINT32 ulDsCfg);
-
-//EYE test
-UINT32 serdes_eye_test(UINT32 uwMacroId, UINT32 uwDsNum, UINT32 eyemode, UINT32 scanwindowvalue, UINT32 uwRateData);
-
-UINT32 Serdes_ReadBert(UINT32   ulMacroId , UINT32   ulDsNum);
-
-//PRBS test
-int serdes_prbs_test(UINT8 macro, UINT8 lane, UINT8 prbstype);
-
-int serdes_prbs_test_cancle(UINT8 macro,UINT8 lane);
-
-//CTLE/DFE
-void serdes_ctle_adaptation_close(UINT32 macro,UINT32 lane);
-
-void serdes_ctle_adaptation_open(UINT32 macro,UINT32 lane);
-
-void serdes_dfe_adaptation_close(UINT32 macro,UINT32 lane);
-
-void serdes_dfe_adaptation_open(UINT32 macro,UINT32 lane);
-
-void serdes_ctle_dfe_reset(UINT32 macro,UINT32 lane);
-//int serdes_reset(UINT32 macro);
-//int serdes_release_reset(UINT32 macro);
-void Custom_Wave(UINT32 macro,UINT32 lane,UINT32 mode);
-void serdes_ffe_show(UINT32 macro,UINT32 lane);
-void serdes_dfe_show(UINT32 macro,UINT32 lane);
-int  serdes_read_bert(UINT8 macro, UINT8 lane);
-void  serdes_clean_bert(UINT8 macro, UINT8 lane);
-int  serdes_get_four_point_eye_diagram(UINT32 macro, UINT32 lane,UINT32 eyemode, UINT32 data_rate);
-void serdes_release_mcu(UINT32 macro,UINT32 val);
-int hilink_write(UINT32 macro, UINT32 reg, UINT32 value);
-int hilink_read(UINT32 macro, UINT32 reg, UINT32 *value);
-int serdes_tx_to_rx_parallel_loopback(UINT8 macro,UINT8 lane,UINT8 val);//TXRXPARLPBKEN
-int serdes_rx_to_tx_parallel_loopback(UINT8 macro,UINT8 lane,UINT8 val);
-int serdes_tx_to_rx_serial_loopback(UINT8 macro,UINT8 lane,UINT8 val);
-void serdes_ctle_show(UINT32 macro,UINT32 lane);
-int serdes_cs_write(UINT32 macro,UINT32 cs_num,UINT32 reg_num,UINT32 bit_high,UINT32 bit_low,UINT32 value);
-UINT32 serdes_cs_read(UINT32 macro,UINT32 cs_num,UINT32 reg_num);
-int serdes_ds_write(UINT32 macro,UINT32 ds_num,UINT32 ds_index,UINT32 reg_num,UINT32 bit_high,UINT32 bit_low,UINT32 value);
-int serdes_ds_read(UINT32 macro,UINT32 ds_num,UINT32 ds_index,UINT32 reg_num);
-int report_serdes_mux(void);
-int serdes_key_reg_show(UINT32 macro);
-void serdes_state_show(UINT32 macro);
-UINT32 Serdes_ReadBert(UINT32   ulMacroId , UINT32   ulDsNum);
-
 #endif
diff --git a/Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h b/Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h
index 7ff924bd8954..b493dd9ac090 100644
--- a/Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h
+++ b/Silicon/Hisilicon/Hi1616/Include/Library/SerdesLib.h
@@ -16,71 +16,7 @@
 #ifndef _SERDES_LIB_H_
 #define _SERDES_LIB_H_
 
-typedef enum {
-  EmHilink0Hccs1X8 = 0,
-  EmHilink0Pcie1X8 = 2,
-  EmHilink0Pcie1X4Pcie2X4 = 3,
-  EmHilink0Sas2X8 = 4,
-  EmHilink0Hccs1X8Width16,
-  EmHilink0Hccs1X8Width32,
-  EmHilink0Hccs1X8Speed5G,
-} HILINK0_MODE_TYPE;
-
-typedef enum {
-  EmHilink1Sas2X1 = 0,
-  EmHilink1Hccs0X8 = 1,
-  EmHilink1Pcie0X8 = 2,
-  EmHilink1Hccs0X8Width16,
-  EmHilink1Hccs0X8Width32,
-  EmHilink1Hccs0X8Speed5G,
-} HILINK1_MODE_TYPE;
-
-typedef enum {
-  EmHilink2Pcie2X8 = 0,
-  EmHilink2Hccs2X8 = 1,
-  EmHilink2Sas0X8 = 2,
-  EmHilink2Hccs2X8Width16,
-  EmHilink2Hccs2X8Width32,
-  EmHilink2Hccs2X8Speed5G,
-} HILINK2_MODE_TYPE;
-
-typedef enum {
-  EmHilink5Pcie3X4 = 0,
-  EmHilink5Pcie2X2Pcie3X2 = 1,
-  EmHilink5Sas1X4 = 2,
-} HILINK5_MODE_TYPE;
-
-
-typedef struct {
-  HILINK0_MODE_TYPE Hilink0Mode;
-  HILINK1_MODE_TYPE Hilink1Mode;
-  HILINK2_MODE_TYPE Hilink2Mode;
-  UINT32 Hilink3Mode;
-  UINT32 Hilink4Mode;
-  HILINK5_MODE_TYPE Hilink5Mode;
-  UINT32 Hilink6Mode;
-  UINT32 UseSsc;
-} SERDES_PARAM;
-
-#define SERDES_INVALID_MACRO_ID  0xFFFFFFFF
-#define SERDES_INVALID_LANE_NUM  0xFFFFFFFF
-#define SERDES_INVALID_RATE_MODE  0xFFFFFFFF
-
-typedef struct {
-  UINT32 MacroId;
-  UINT32 DsNum;
-  UINT32 DsCfg;
-} SERDES_POLARITY_INVERT;
-
-EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId);
-extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[];
-extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[];
-UINT32 GetEthType(UINT8 EthChannel);
-VOID SerdesEnableCtleDfe(UINT32 NimbusId, UINT32 Macro, UINT32 Lane, UINT32 LaneMode);
-
 EFI_STATUS
 EfiSerdesInitWrap (VOID);
-INT32 SerdesReset(UINT32 SiclId, UINT32 Macro);
-VOID SerdesLoadFirmware(UINT32 SiclId, UINT32 Macro);
 
 #endif
diff --git a/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h b/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h
deleted file mode 100644
index 05f0f7020e82..000000000000
--- a/Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/** @file
-*
-*  Copyright (c) 2018, Hisilicon Limited. All rights reserved.
-*  Copyright (c) 2018, Linaro Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#ifndef _SERDES_LIB_H_
-#define _SERDES_LIB_H_
-
-typedef enum {
-  EmHilink0Hccs1X8 = 0,
-  EmHilink0Pcie1X8 = 2,
-  EmHilink0Pcie1X4Pcie2X4 = 3,
-  EmHilink0Sas2X8 = 4,
-  EmHilink0Hccs1X8Width16,
-  EmHilink0Hccs1X8Width32,
-  EmHilink0Hccs1X8Speed5G,
-} HILINK0_MODE_TYPE;
-
-typedef enum {
-  EmHilink1Sas2X1 = 0,
-  EmHilink1Hccs0X8 = 1,
-  EmHilink1Pcie0X8 = 2,
-  EmHilink1Hccs0X8Width16,
-  EmHilink1Hccs0X8Width32,
-  EmHilink1Hccs0X8Speed5G,
-} HILINK1_MODE_TYPE;
-
-typedef enum {
-  EmHilink2Pcie2X8 = 0,
-  EmHilink2Hccs2X8 = 1,
-  EmHilink2Sas0X8 = 2,
-  EmHilink2Hccs2X8Width16,
-  EmHilink2Hccs2X8Width32,
-  EmHilink2Hccs2X8Speed5G,
-} HILINK2_MODE_TYPE;
-
-typedef enum {
-  EmHilink5Pcie3X4 = 0,
-  EmHilink5Pcie2X2Pcie3X2 = 1,
-  EmHilink5Sas1X4 = 2,
-} HILINK5_MODE_TYPE;
-
-
-typedef struct {
-  HILINK0_MODE_TYPE Hilink0Mode;
-  HILINK1_MODE_TYPE Hilink1Mode;
-  HILINK2_MODE_TYPE Hilink2Mode;
-  UINT32 Hilink3Mode;
-  UINT32 Hilink4Mode;
-  HILINK5_MODE_TYPE Hilink5Mode;
-  UINT32 Hilink6Mode;
-  UINT32 UseSsc;
-} SERDES_PARAM;
-
-#define SERDES_INVALID_MACRO_ID  0xFFFFFFFF
-#define SERDES_INVALID_LANE_NUM  0xFFFFFFFF
-#define SERDES_INVALID_RATE_MODE  0xFFFFFFFF
-
-typedef struct {
-  UINT32 MacroId;
-  UINT32 DsNum;
-  UINT32 DsCfg;
-} SERDES_POLARITY_INVERT;
-
-EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId);
-extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[];
-extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[];
-UINT32 GetEthType (UINT8 EthChannel);
-VOID SerdesEnableCtleDfe (UINT32 NimbusId, UINT32 Macro, UINT32 Lane, UINT32 LaneMode);
-
-EFI_STATUS EfiSerdesInitWrap (UINT32 RateMode);
-INT32 SerdesReset (UINT32 SiclId, UINT32 Macro);
-VOID SerdesLoadFirmware (UINT32 SiclId, UINT32 Macro);
-INT32 h30_serdes_run_firmware (UINT32 nimbus_id, UINT32 macro, UINT8 DsMask, UINT8 ctle_mode);
-#endif
diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
index ea95fe38d75c..b5a768856484 100644
--- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h
+++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h
@@ -26,6 +26,62 @@
 #define HCCS_PLL_VALUE_2800  0x52240701
 #define HCCS_PLL_VALUE_3000  0x52240781
 
+typedef enum {
+  EmHilink0Hccs1X8 = 0,
+  EmHilink0Pcie1X8 = 2,
+  EmHilink0Pcie1X4Pcie2X4 = 3,
+  EmHilink0Sas2X8 = 4,
+  EmHilink0Hccs1X8Width16,
+  EmHilink0Hccs1X8Width32,
+  EmHilink0Hccs1X8Speed5G,
+} HILINK0_MODE_TYPE;
+
+typedef enum {
+  EmHilink1Sas2X1 = 0,
+  EmHilink1Hccs0X8 = 1,
+  EmHilink1Pcie0X8 = 2,
+  EmHilink1Hccs0X8Width16,
+  EmHilink1Hccs0X8Width32,
+  EmHilink1Hccs0X8Speed5G,
+} HILINK1_MODE_TYPE;
+
+typedef enum {
+  EmHilink2Pcie2X8 = 0,
+  EmHilink2Hccs2X8 = 1,
+  EmHilink2Sas0X8 = 2,
+  EmHilink2Hccs2X8Width16,
+  EmHilink2Hccs2X8Width32,
+  EmHilink2Hccs2X8Speed5G,
+} HILINK2_MODE_TYPE;
+
+typedef enum {
+  EmHilink5Pcie3X4 = 0,
+  EmHilink5Pcie2X2Pcie3X2 = 1,
+  EmHilink5Sas1X4 = 2,
+} HILINK5_MODE_TYPE;
+
+
+typedef struct {
+  HILINK0_MODE_TYPE Hilink0Mode;
+  HILINK1_MODE_TYPE Hilink1Mode;
+  HILINK2_MODE_TYPE Hilink2Mode;
+  UINT32 Hilink3Mode;
+  UINT32 Hilink4Mode;
+  HILINK5_MODE_TYPE Hilink5Mode;
+  UINT32 Hilink6Mode;
+  UINT32 UseSsc;
+} SERDES_PARAM;
+
+#define SERDES_INVALID_MACRO_ID  0xFFFFFFFF
+#define SERDES_INVALID_LANE_NUM  0xFFFFFFFF
+#define SERDES_INVALID_RATE_MODE  0xFFFFFFFF
+
+typedef struct {
+  UINT32 MacroId;
+  UINT32 DsNum;
+  UINT32 DsCfg;
+} SERDES_POLARITY_INVERT;
+
 
 #define PCIEDEVICE_REPORT_MAX      8
 #define MAX_PROCESSOR_SOCKETS      MAX_SOCKET
@@ -65,4 +121,11 @@ OemGetHccsFreq (
   VOID
   );
 
+EFI_STATUS
+OemGetSerdesParam (
+  SERDES_PARAM *ParamA,
+  SERDES_PARAM *ParamB,
+  UINT32       SocketId
+  );
+
 #endif
diff --git a/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
index 4771cb900c82..218b3540eb7f 100644
--- a/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
+++ b/Platform/Hisilicon/D03/Library/OemMiscLib2P/BoardFeature2PHi1610.c
@@ -21,7 +21,6 @@
 
 #include <PlatformArch.h>
 #include <Library/OemMiscLib.h>
-#include <Library/SerdesLib.h>
 #include <Library/I2CLib.h>
 #include <Library/HiiLib.h>
 
diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c b/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c
index ae4c194070e8..1a9ed620c80c 100644
--- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c
+++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/BoardFeatureD05.c
@@ -22,7 +22,6 @@
 #include <Library/I2CLib.h>
 #include <Library/IoLib.h>
 #include <Library/OemMiscLib.h>
-#include <Library/SerdesLib.h>
 #include <Protocol/Smbios.h>
 
 
diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c
index 7e3f2e2a0e7d..c28ac6266fc6 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c
+++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c
@@ -21,7 +21,6 @@
 #include <Library/I2CLib.h>
 #include <Library/IoLib.h>
 #include <Library/OemMiscLib.h>
-#include <Library/SerdesLib.h>
 #include <Protocol/Smbios.h>
 
 #include <PlatformArch.h>
diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
index 914387de7d63..758157525f40 100644
--- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
+++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c
@@ -24,7 +24,6 @@
 #include <Library/OemMiscLib.h>
 #include <Library/PcdLib.h>
 #include <Library/PlatformSysCtrlLib.h>
-#include <Library/SerdesLib.h>
 #include <Library/SerialPortLib.h>
 #include <Library/TimerLib.h>
 
diff --git a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c
index bc33639ac51d..945fd4c6e3c0 100644
--- a/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c
+++ b/Silicon/Hisilicon/Drivers/Smbios/SmbiosMiscDxe/Type09/MiscSystemSlotDesignationFunction.c
@@ -17,7 +17,7 @@
 
 #include "SmbiosMisc.h"
 
-#include <Library/SerdesLib.h>
+#include <Library/OemMiscLib.h>
 
 extern SMBIOS_TABLE_TYPE9 MiscSystemSlotDesignationPcie0Data;
 extern SMBIOS_TABLE_TYPE9 MiscSystemSlotDesignationPcie1Data;
