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[54.158.76.221]) by mx.google.com with ESMTPS id 24si982639qtu.137.2019.02.19.23.31.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Feb 2019 23:31:50 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) client-ip=54.158.76.221; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.158.76.221 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 46BBA6196F; Wed, 20 Feb 2019 07:31:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on ip-10-150-125-211.ec2.internal X-Spam-Level: X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id E111861986; Wed, 20 Feb 2019 07:30:11 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 6F16161950; Wed, 20 Feb 2019 07:30:08 +0000 (UTC) Received: from mail-pg1-f194.google.com (mail-pg1-f194.google.com [209.85.215.194]) by lists.linaro.org (Postfix) with ESMTPS id 90AFA6196F for ; Wed, 20 Feb 2019 07:29:11 +0000 (UTC) Received: by mail-pg1-f194.google.com with SMTP id y4so11414805pgc.12 for ; Tue, 19 Feb 2019 23:29:11 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ab7zoCPUAckYvbGEHQgQ2OoONoXR45pa9pDts4Jv7Lw=; b=Gn9hD+VZI2wE9zBVrk1ObonOYynao8VLoZ5x5elTSGbRMoEn4iZq+XRFG+CWW6ALR6 Wq6l2RVjhc+ARe2JZsR8I4FgvoVGHIL6HPLBtqrt6wUrOLiF+SiBQo81fvcVFeZd1UbG FHpECmH60J4O1clFJjkm8ur8RXbCoKyDNjULxyd6RG0HjvP4KdfTuQquSjdJbeblMZ+t 17VeNcon5DgYfAa/nUJtqgJZLZGcbs84Y/sC0EdVMYm6EFipkfFJBduTFLL+MhRn/Fe9 ozmgnd8b+IROrV6XQi82bkBNH9AjOidVytLzSL36P2J/8GTqoe7rBBUNt+BkuG9auA7R 4low== X-Gm-Message-State: AHQUAuaL67lLev3LwbFjooC6Q4x9FBTfXUI6FWdOOQy/SgGyCxLzCfmK D4UXRi5PyFzLH9TdkPQkfU1Weylliazfzg== X-Received: by 2002:aa7:92da:: with SMTP id k26mr18771387pfa.216.1550647750936; Tue, 19 Feb 2019 23:29:10 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id 23sm19152969pft.187.2019.02.19.23.29.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 Feb 2019 23:29:10 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Wed, 20 Feb 2019 15:28:27 +0800 Message-Id: <20190220072837.35058-9-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190220072837.35058-1-ming.huang@linaro.org> References: <20190220072837.35058-1-ming.huang@linaro.org> Cc: huangming23@huawei.com, john.garry@huawei.com, xiaojun2@hisilicon.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [PATCH edk2-platforms v2 08/18] Hisilicon/D06: Use HCCS speed with 2.6G X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Follow chip team suggestion, HCCS(Huawei Cache-Coherent System) may be unstable while speed is 3.0G, so use 2.6G to avoid some unstable stress issue. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Include/Library/OemMiscLib.h | 10 ++++++++++ Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 8 ++++++++ 2 files changed, 18 insertions(+) diff --git a/Silicon/Hisilicon/Include/Library/OemMiscLib.h b/Silicon/Hisilicon/Include/Library/OemMiscLib.h index dfac87d635d9..ea95fe38d75c 100644 --- a/Silicon/Hisilicon/Include/Library/OemMiscLib.h +++ b/Silicon/Hisilicon/Include/Library/OemMiscLib.h @@ -22,6 +22,11 @@ #include #include +#define HCCS_PLL_VALUE_2600 0x52240681 +#define HCCS_PLL_VALUE_2800 0x52240701 +#define HCCS_PLL_VALUE_3000 0x52240781 + + #define PCIEDEVICE_REPORT_MAX 8 #define MAX_PROCESSOR_SOCKETS MAX_SOCKET #define MAX_MEMORY_CHANNELS MAX_CHANNEL @@ -55,4 +60,9 @@ extern EFI_STRING_ID gDimmToDevLocator[MAX_SOCKET][MAX_CHANNEL][MAX_DIMM]; EFI_HII_HANDLE EFIAPI OemGetPackages (); UINTN OemGetCpuFreq (UINT8 Socket); +UINTN +OemGetHccsFreq ( + VOID + ); + #endif diff --git a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c index 624fa33d2e14..914387de7d63 100644 --- a/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c +++ b/Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c @@ -223,3 +223,11 @@ UINTN OemGetCpuFreq (UINT8 Socket) } } +UINTN +OemGetHccsFreq ( + VOID + ) +{ + return HCCS_PLL_VALUE_2600; +} +