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([185.25.64.249]) by mx.google.com with ESMTPSA id w10sm4036805wia.4.2013.10.24.07.24.47 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 Oct 2013 07:24:47 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Cc: patches@linaro.org, ian.campbell@citrix.com, time@xen.org, stefano.stabellini@citrix.com, Julien Grall Subject: [PATCH] xen/arm: p2m: flush tlb when a domain is destroyed Date: Thu, 24 Oct 2013 15:24:43 +0100 Message-Id: <1382624683-27093-1-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.54 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Once the VMID is marked unused, a new domain can reuse the VMID for its own. If the TLB is not flushed, entries can contain wrong translation. Arm assembly doesn't provide instruction to flush TLB by VMID, except for current VMID but the domain is already unscheduled from every physical CPUs. So flush TLB for all VMIDs on every CPU (inner shareable). Signed-off-by: Julien Grall --- xen/arch/arm/p2m.c | 3 +++ xen/include/asm-arm/arm32/flushtlb.h | 11 +++++++++++ 2 files changed, 14 insertions(+) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 2d09fef..d4497f9 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -357,6 +357,9 @@ static void p2m_free_vmid(struct domain *d) spin_lock(&vmid_alloc_lock); if ( p2m->vmid != INVALID_VMID ) clear_bit(p2m->vmid, vmid_mask); + + flush_tlb_all(); + spin_unlock(&vmid_alloc_lock); } diff --git a/xen/include/asm-arm/arm32/flushtlb.h b/xen/include/asm-arm/arm32/flushtlb.h index a258f58..7b4a73e 100644 --- a/xen/include/asm-arm/arm32/flushtlb.h +++ b/xen/include/asm-arm/arm32/flushtlb.h @@ -23,6 +23,17 @@ static inline void flush_tlb_all_local(void) isb(); } +/* Flush inner shareable TLBs, all VMIDs, non-hypervisor mode */ +static inline void flush_tlb_all(void) +{ + dsb(); + + WRITE_CP32((uint32_t) 0, TLBIALLNSNHIS); + + dsb(); + isb(); +} + #endif /* __ASM_ARM_ARM32_FLUSHTLB_H__ */ /* * Local variables: