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([185.25.64.249]) by mx.google.com with ESMTPSA id v6sm51090920eef.2.2014.02.11.12.04.57 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 11 Feb 2014 12:04:58 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 11 Feb 2014 20:04:42 +0000 Message-Id: <1392149085-14366-3-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1392149085-14366-1-git-send-email-julien.grall@linaro.org> References: <1392149085-14366-1-git-send-email-julien.grall@linaro.org> Cc: stefano.stabellini@citrix.com, Julien Grall , tim@xen.org, ian.campbell@citrix.com Subject: [Xen-devel] [RFC for-4.5 2/5] xen/arm32: Introduce lookup_processor_type X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Looking for a specific proc_info structure is already implemented in assembly. Implement lookup_processor_type to avoid duplicate code between C and assembly. This function searches the proc_info_list structure following the processor ID. If the search fail, it will return NULL, otherwise a pointer to this structure for the specific processor. Signed-off-by: Julien Grall Acked-by: Ian Campbell --- xen/arch/arm/arm32/head.S | 57 ++++++++++++++++++++++++++++++++++----------- 1 file changed, 43 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 77f5518..68fb499 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -198,26 +198,16 @@ skip_bss: PRINT("- Setting up control registers -\r\n") /* Get processor specific proc info into r1 */ - mrc CP32(r0, MIDR) /* r0 := our cpu id */ - ldr r1, = __proc_info_start - add r1, r1, r10 /* r1 := paddr of table (start) */ - ldr r2, = __proc_info_end - add r2, r2, r10 /* r2 := paddr of table (end) */ -1: ldr r3, [r1, #PROCINFO_cpu_mask] - and r4, r0, r3 /* r4 := our cpu id with mask */ - ldr r3, [r1, #PROCINFO_cpu_val] /* r3 := cpu val in current proc info */ - teq r4, r3 - beq 2f /* Match => exit, or try next proc info */ - add r1, r1, #PROCINFO_sizeof - cmp r1, r2 - blo 1b + bl __lookup_processor_type + teq r1, #0 + bne 1f mov r4, r0 PRINT("- Missing processor info: ") mov r0, r4 bl putn PRINT(" -\r\n") b fail -2: +1: /* Jump to cpu_init */ ldr r1, [r1, #PROCINFO_cpu_init] /* r1 := vaddr(init func) */ @@ -545,6 +535,45 @@ putn: mov pc, lr #endif /* !CONFIG_EARLY_PRINTK */ +/* This provides a C-API version of __lookup_processor_type */ +GLOBAL(lookup_processor_type) + stmfd sp!, {r4, r10, lr} + mov r10, #0 /* r10 := offset between virt&phys */ + bl __lookup_processor_type + mov r0, r1 + ldmfd sp!, {r4, r10, pc} + +/* Read processor ID register (CP#15, CR0), and Look up in the linker-built + * supported processor list. Note that we can't use the absolute addresses for + * the __proc_info lists since we aren't running with the MMU on (and therefore, + * we are not in correct address space). We have to calculate the offset. + * + * r10: offset between virt&phys + * + * Returns: + * r0: CPUID + * r1: proc_info pointer + * Clobbers r2-r4 + */ +__lookup_processor_type: + mrc CP32(r0, MIDR) /* r0 := our cpu id */ + ldr r1, = __proc_info_start + add r1, r1, r10 /* r1 := paddr of table (start) */ + ldr r2, = __proc_info_end + add r2, r2, r10 /* r2 := paddr of table (end) */ +1: ldr r3, [r1, #PROCINFO_cpu_mask] + and r4, r0, r3 /* r4 := our cpu id with mask */ + ldr r3, [r1, #PROCINFO_cpu_val] /* r3 := cpu val in current proc info */ + teq r4, r3 + beq 2f /* Match => exit, or try next proc info */ + add r1, r1, #PROCINFO_sizeof + cmp r1, r2 + blo 1b + /* We failed to find the proc_info, return NULL */ + mov r1, #0 +2: + mov pc, lr + /* * Local variables: * mode: ASM