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[50.57.142.19]) by mx.google.com with ESMTPS id xn5si467192vdc.68.2014.02.26.10.57.07 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 26 Feb 2014 10:57:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xen.org designates 50.57.142.19 as permitted sender) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WIjds-00012l-Fn; Wed, 26 Feb 2014 18:55:40 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WIjdq-00012g-Vi for xen-devel@lists.xensource.com; Wed, 26 Feb 2014 18:55:39 +0000 Received: from [85.158.143.35:29276] by server-1.bemta-4.messagelabs.com id DA/E2-31661-AA83E035; Wed, 26 Feb 2014 18:55:38 +0000 X-Env-Sender: Stefano.Stabellini@citrix.com X-Msg-Ref: server-11.tower-21.messagelabs.com!1393440935!8548275!1 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n X-StarScan-Received: X-StarScan-Version: 6.9.16; banners=-,-,- X-VirusChecked: Checked Received: (qmail 4520 invoked from network); 26 Feb 2014 18:55:37 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-11.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 26 Feb 2014 18:55:37 -0000 X-IronPort-AV: E=Sophos;i="4.97,549,1389744000"; d="scan'208";a="106029837" Received: from accessns.citrite.net (HELO FTLPEX01CL03.citrite.net) ([10.9.154.239]) by FTLPIPO01.CITRIX.COM with ESMTP; 26 Feb 2014 18:55:27 +0000 Received: from ukmail1.uk.xensource.com (10.80.16.128) by smtprelay.citrix.com (10.13.107.80) with Microsoft SMTP Server id 14.2.342.4; Wed, 26 Feb 2014 13:55:26 -0500 Received: from kaball.uk.xensource.com ([10.80.2.59]) by ukmail1.uk.xensource.com with esmtp (Exim 4.69) (envelope-from ) id 1WIjOm-0004S3-Fx; Wed, 26 Feb 2014 18:40:04 +0000 From: Stefano Stabellini To: Date: Wed, 26 Feb 2014 18:39:57 +0000 Message-ID: <1393439997-26936-12-git-send-email-stefano.stabellini@eu.citrix.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 X-DLP: MIA1 Cc: julien.grall@citrix.com, jtd@galois.com, Ian.Campbell@citrix.com, Stefano Stabellini Subject: [Xen-devel] [PATCH-4.5 v3 12/12] xen/arm: print more info in gic_dump_info, keep gic_lr sync'ed X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: stefano.stabellini@eu.citrix.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.173 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: For each inflight and pending irqs print GIC_IRQ_GUEST_ENABLED, GIC_IRQ_GUEST_PENDING and GIC_IRQ_GUEST_VISIBLE. In order to get consistent information from gic_dump_info, we need to get the vgic.lock and disable interrupts before walking the inflight and lr_pending lists. We also need to keep v->arch.gic_lr in sync with GICH_LR registers. Signed-off-by: Stefano Stabellini --- Changes in v3: - use spin_lock_irqsave and spin_unlock_irqrestore in gic_dump_info. --- xen/arch/arm/gic.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index aaba8b0..7de4443 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -639,6 +639,7 @@ static inline void gic_set_lr(struct vcpu *v, int lr, unsigned int irq, ((p->desc->irq & GICH_LR_PHYSICAL_MASK) << GICH_LR_PHYSICAL_SHIFT); GICH[GICH_LR + lr] = lr_reg; + v->arch.gic_lr[lr] = lr_reg; set_bit(GIC_IRQ_GUEST_VISIBLE, &p->status); clear_bit(GIC_IRQ_GUEST_PENDING, &p->status); @@ -714,11 +715,15 @@ static void _gic_clear_lr(struct vcpu *v, int i) if ( p->desc == NULL && test_bit(GIC_IRQ_GUEST_ENABLED, &p->status) && test_and_clear_bit(GIC_IRQ_GUEST_PENDING, &p->status) ) + { GICH[GICH_LR + i] = lr | GICH_LR_PENDING; + v->arch.gic_lr[i] = lr | GICH_LR_PENDING; + } } else if ( lr & GICH_LR_PENDING ) { clear_bit(GIC_IRQ_GUEST_PENDING, &p->status); } else { GICH[GICH_LR + i] = 0; + v->arch.gic_lr[i] = 0; clear_bit(i, &this_cpu(lr_mask)); if ( p->desc != NULL ) @@ -1006,8 +1011,11 @@ void gic_dump_info(struct vcpu *v) { int i; struct pending_irq *p; + unsigned long flags; printk("GICH_LRs (vcpu %d) mask=%"PRIx64"\n", v->vcpu_id, v->arch.lr_mask); + + spin_lock_irqsave(&v->arch.vgic.lock, flags); if ( v == current ) { for ( i = 0; i < nr_lrs; i++ ) @@ -1019,14 +1027,20 @@ void gic_dump_info(struct vcpu *v) list_for_each_entry ( p, &v->arch.vgic.inflight_irqs, inflight ) { - printk("Inflight irq=%d lr=%u\n", p->irq, p->lr); + printk("Inflight irq=%d lr=%u enable=%d pending=%d visible=%d\n", + p->irq, p->lr, test_bit(GIC_IRQ_GUEST_ENABLED, &p->status), + test_bit(GIC_IRQ_GUEST_PENDING, &p->status), + test_bit(GIC_IRQ_GUEST_VISIBLE, &p->status)); } list_for_each_entry( p, &v->arch.vgic.lr_pending, lr_queue ) { - printk("Pending irq=%d lr=%u\n", p->irq, p->lr); + printk("Pending irq=%d lr=%u enable=%d pending=%d visible=%d\n", + p->irq, p->lr, test_bit(GIC_IRQ_GUEST_ENABLED, &p->status), + test_bit(GIC_IRQ_GUEST_PENDING, &p->status), + test_bit(GIC_IRQ_GUEST_VISIBLE, &p->status)); } - + spin_unlock_irqrestore(&v->arch.vgic.lock, flags); } void __cpuinit init_maintenance_interrupt(void)