diff --git a/xen/arch/arm/arm64/domain.c b/xen/arch/arm/arm64/domain.c
index 6990a7b..ccba21f 100644
--- a/xen/arch/arm/arm64/domain.c
+++ b/xen/arch/arm/arm64/domain.c
@@ -29,7 +29,7 @@ void vcpu_regs_hyp_to_user(const struct vcpu *vcpu,
 {
 #define C(hyp,user) regs->user = vcpu->arch.cpu_info->guest_cpu_user_regs.hyp
     ALLREGS;
-    if ( is_pv32_domain(vcpu->domain) )
+    if ( is_32bit_domain(vcpu->domain) )
     {
         ALLREGS32;
     }
@@ -45,7 +45,7 @@ void vcpu_regs_user_to_hyp(struct vcpu *vcpu,
 {
 #define C(hyp,user) vcpu->arch.cpu_info->guest_cpu_user_regs.hyp = regs->user
     ALLREGS;
-    if ( is_pv32_domain(vcpu->domain) )
+    if ( is_32bit_domain(vcpu->domain) )
     {
         ALLREGS32;
     }
diff --git a/xen/arch/arm/arm64/domctl.c b/xen/arch/arm/arm64/domctl.c
index e2b4617..41e2562 100644
--- a/xen/arch/arm/arm64/domctl.c
+++ b/xen/arch/arm/arm64/domctl.c
@@ -35,9 +35,9 @@ long subarch_do_domctl(struct xen_domctl *domctl, struct domain *d,
         switch ( domctl->u.address_size.size )
         {
         case 32:
-            return switch_mode(d, DOMAIN_PV32);
+            return switch_mode(d, DOMAIN_32BIT);
         case 64:
-            return switch_mode(d, DOMAIN_PV64);
+            return switch_mode(d, DOMAIN_64BIT);
         default:
             return -EINVAL;
         }
diff --git a/xen/arch/arm/decode.c b/xen/arch/arm/decode.c
index 8880c39..9d237f8 100644
--- a/xen/arch/arm/decode.c
+++ b/xen/arch/arm/decode.c
@@ -151,7 +151,7 @@ bad_thumb:
 
 int decode_instruction(const struct cpu_user_regs *regs, struct hsr_dabt *dabt)
 {
-    if ( is_pv32_domain(current->domain) && regs->cpsr & PSR_THUMB )
+    if ( is_32bit_domain(current->domain) && regs->cpsr & PSR_THUMB )
         return decode_thumb(regs->pc, dabt);
 
     /* TODO: Handle ARM instruction */
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 82a1e79..0f83e81 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -74,7 +74,7 @@ static void ctxt_switch_from(struct vcpu *p)
     /* Arch timer */
     virt_timer_save(p);
 
-    if ( is_pv32_domain(p->domain) && cpu_has_thumbee )
+    if ( is_32bit_domain(p->domain) && cpu_has_thumbee )
     {
         p->arch.teecr = READ_SYSREG32(TEECR32_EL1);
         p->arch.teehbr = READ_SYSREG32(TEEHBR32_EL1);
@@ -92,7 +92,7 @@ static void ctxt_switch_from(struct vcpu *p)
     p->arch.ttbcr = READ_SYSREG(TCR_EL1);
     p->arch.ttbr0 = READ_SYSREG64(TTBR0_EL1);
     p->arch.ttbr1 = READ_SYSREG64(TTBR1_EL1);
-    if ( is_pv32_domain(p->domain) )
+    if ( is_32bit_domain(p->domain) )
         p->arch.dacr = READ_SYSREG(DACR32_EL2);
     p->arch.par = READ_SYSREG64(PAR_EL1);
 #if defined(CONFIG_ARM_32)
@@ -115,7 +115,7 @@ static void ctxt_switch_from(struct vcpu *p)
     p->arch.esr = READ_SYSREG64(ESR_EL1);
 #endif
 
-    if ( is_pv32_domain(p->domain) )
+    if ( is_32bit_domain(p->domain) )
         p->arch.ifsr  = READ_SYSREG(IFSR32_EL2);
     p->arch.afsr0 = READ_SYSREG(AFSR0_EL1);
     p->arch.afsr1 = READ_SYSREG(AFSR1_EL1);
@@ -164,7 +164,7 @@ static void ctxt_switch_to(struct vcpu *n)
     WRITE_SYSREG64(n->arch.esr, ESR_EL1);
 #endif
 
-    if ( is_pv32_domain(n->domain) )
+    if ( is_32bit_domain(n->domain) )
         WRITE_SYSREG(n->arch.ifsr, IFSR32_EL2);
     WRITE_SYSREG(n->arch.afsr0, AFSR0_EL1);
     WRITE_SYSREG(n->arch.afsr1, AFSR1_EL1);
@@ -174,7 +174,7 @@ static void ctxt_switch_to(struct vcpu *n)
     WRITE_SYSREG(n->arch.ttbcr, TCR_EL1);
     WRITE_SYSREG64(n->arch.ttbr0, TTBR0_EL1);
     WRITE_SYSREG64(n->arch.ttbr1, TTBR1_EL1);
-    if ( is_pv32_domain(n->domain) )
+    if ( is_32bit_domain(n->domain) )
         WRITE_SYSREG(n->arch.dacr, DACR32_EL2);
     WRITE_SYSREG64(n->arch.par, PAR_EL1);
 #if defined(CONFIG_ARM_32)
@@ -197,7 +197,7 @@ static void ctxt_switch_to(struct vcpu *n)
     WRITE_SYSREG(n->arch.tpidrro_el0, TPIDRRO_EL0);
     WRITE_SYSREG(n->arch.tpidr_el1, TPIDR_EL1);
 
-    if ( is_pv32_domain(n->domain) && cpu_has_thumbee )
+    if ( is_32bit_domain(n->domain) && cpu_has_thumbee )
     {
         WRITE_SYSREG32(n->arch.teecr, TEECR32_EL1);
         WRITE_SYSREG32(n->arch.teehbr, TEEHBR32_EL1);
@@ -214,7 +214,7 @@ static void ctxt_switch_to(struct vcpu *n)
 
     isb();
 
-    if ( is_pv32_domain(n->domain) )
+    if ( is_32bit_domain(n->domain) )
         hcr &= ~HCR_RW;
     else
         hcr |= HCR_RW;
@@ -257,7 +257,7 @@ static void continue_new_vcpu(struct vcpu *prev)
 
     if ( is_idle_vcpu(current) )
         reset_stack_and_jump(idle_loop);
-    else if is_pv32_domain(current->domain)
+    else if is_32bit_domain(current->domain)
         /* check_wakeup_from_wait(); */
         reset_stack_and_jump(return_to_new_vcpu32);
     else
@@ -616,7 +616,7 @@ int arch_set_info_guest(
     struct vcpu_guest_context *ctxt = c.nat;
     struct vcpu_guest_core_regs *regs = &c.nat->user_regs;
 
-    if ( is_pv32_domain(v->domain) )
+    if ( is_32bit_domain(v->domain) )
     {
         if ( !is_guest_pv32_psr(regs->cpsr) )
             return -EINVAL;
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 5ca2f15..d3345bf 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -507,7 +507,7 @@ static int make_cpus_node(const struct domain *d, void *fdt,
                 return res;
         }
 
-        if ( is_pv64_domain(d) )
+        if ( is_64bit_domain(d) )
         {
             res = fdt_property_string(fdt, "enable-method", "psci");
             if ( res )
@@ -1024,7 +1024,7 @@ int construct_dom0(struct domain *d)
     p2m_load_VTTBR(d);
 #ifdef CONFIG_ARM_64
     d->arch.type = kinfo.type;
-    if ( is_pv32_domain(d) )
+    if ( is_32bit_domain(d) )
         WRITE_SYSREG(READ_SYSREG(HCR_EL2) & ~HCR_RW, HCR_EL2);
     else
         WRITE_SYSREG(READ_SYSREG(HCR_EL2) | HCR_RW, HCR_EL2);
@@ -1048,7 +1048,7 @@ int construct_dom0(struct domain *d)
 
     regs->pc = (register_t)kinfo.entry;
 
-    if ( is_pv32_domain(d) )
+    if ( is_32bit_domain(d) )
     {
         regs->cpsr = PSR_GUEST32_INIT;
 
diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c
index 1e3107d..c6c41ba 100644
--- a/xen/arch/arm/kernel.c
+++ b/xen/arch/arm/kernel.c
@@ -209,7 +209,7 @@ static int kernel_try_zimage64_prepare(struct kernel_info *info,
     info->entry = info->zimage.load_addr;
     info->load = kernel_zimage_load;
 
-    info->type = DOMAIN_PV64;
+    info->type = DOMAIN_64BIT;
 
     return 0;
 }
@@ -281,7 +281,7 @@ static int kernel_try_zimage32_prepare(struct kernel_info *info,
     info->load = kernel_zimage_load;
 
 #ifdef CONFIG_ARM_64
-    info->type = DOMAIN_PV32;
+    info->type = DOMAIN_32BIT;
 #endif
 
     return 0;
@@ -329,9 +329,9 @@ static int kernel_try_elf_prepare(struct kernel_info *info,
 
 #ifdef CONFIG_ARM_64
     if ( elf_32bit(&info->elf.elf) )
-        info->type = DOMAIN_PV32;
+        info->type = DOMAIN_32BIT;
     else if ( elf_64bit(&info->elf.elf) )
-        info->type = DOMAIN_PV64;
+        info->type = DOMAIN_64BIT;
     else
     {
         printk("Unknown ELF class\n");
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 21c7b26..563cc62 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -294,7 +294,7 @@ static void inject_undef32_exception(struct cpu_user_regs *regs)
     /* Saved PC points to the instruction past the faulting instruction. */
     uint32_t return_offset = is_thumb ? 2 : 4;
 
-    BUG_ON( !is_pv32_domain(current->domain) );
+    BUG_ON( !is_32bit_domain(current->domain) );
 
     /* Update processor mode */
     cpsr_switch_mode(regs, PSR_MODE_UND);
@@ -322,7 +322,7 @@ static void inject_abt32_exception(struct cpu_user_regs *regs,
     uint32_t return_offset = is_thumb ? 4 : 0;
     register_t fsr;
 
-    BUG_ON( !is_pv32_domain(current->domain) );
+    BUG_ON( !is_32bit_domain(current->domain) );
 
     cpsr_switch_mode(regs, PSR_MODE_ABT);
 
@@ -392,7 +392,7 @@ static void inject_undef64_exception(struct cpu_user_regs *regs, int instr_len)
         .ec = HSR_EC_UNKNOWN,
     };
 
-    BUG_ON( is_pv32_domain(current->domain) );
+    BUG_ON( is_32bit_domain(current->domain) );
 
     regs->spsr_el1 = regs->cpsr;
     regs->elr_el1 = regs->pc;
@@ -429,7 +429,7 @@ static void inject_abt64_exception(struct cpu_user_regs *regs,
         esr.ec = prefetch
             ? HSR_EC_INSTR_ABORT_CURR_EL : HSR_EC_DATA_ABORT_CURR_EL;
 
-    BUG_ON( is_pv32_domain(current->domain) );
+    BUG_ON( is_32bit_domain(current->domain) );
 
     regs->spsr_el1 = regs->cpsr;
     regs->elr_el1 = regs->pc;
@@ -462,7 +462,7 @@ static void inject_iabt_exception(struct cpu_user_regs *regs,
                                   register_t addr,
                                   int instr_len)
 {
-        if ( is_pv32_domain(current->domain) )
+        if ( is_32bit_domain(current->domain) )
             inject_pabt32_exception(regs, addr);
 #ifdef CONFIG_ARM_64
         else
@@ -474,7 +474,7 @@ static void inject_dabt_exception(struct cpu_user_regs *regs,
                                   register_t addr,
                                   int instr_len)
 {
-        if ( is_pv32_domain(current->domain) )
+        if ( is_32bit_domain(current->domain) )
             inject_dabt32_exception(regs, addr);
 #ifdef CONFIG_ARM_64
         else
@@ -679,10 +679,10 @@ static void _show_registers(struct cpu_user_regs *regs,
 
     if ( guest_mode )
     {
-        if ( is_pv32_domain(v->domain) )
+        if ( is_32bit_domain(v->domain) )
             show_registers_32(regs, ctxt, guest_mode, v);
 #ifdef CONFIG_ARM_64
-        else if ( is_pv64_domain(v->domain) )
+        else if ( is_64bit_domain(v->domain) )
             show_registers_64(regs, ctxt, guest_mode, v);
 #endif
     }
@@ -1230,7 +1230,7 @@ static int check_conditional_instr(struct cpu_user_regs *regs, union hsr hsr)
     {
         unsigned long it;
 
-        BUG_ON( !is_pv32_domain(current->domain) || !(cpsr&PSR_THUMB) );
+        BUG_ON( !is_32bit_domain(current->domain) || !(cpsr&PSR_THUMB) );
 
         it = ( (cpsr >> (10-2)) & 0xfc) | ((cpsr >> 25) & 0x3 );
 
@@ -1255,10 +1255,10 @@ static void advance_pc(struct cpu_user_regs *regs, union hsr hsr)
     unsigned long itbits, cond, cpsr = regs->cpsr;
 
     /* PSR_IT_MASK bits can only be set for 32-bit processors in Thumb mode. */
-    BUG_ON( (!is_pv32_domain(current->domain)||!(cpsr&PSR_THUMB))
+    BUG_ON( (!is_32bit_domain(current->domain)||!(cpsr&PSR_THUMB))
             && (cpsr&PSR_IT_MASK) );
 
-    if ( is_pv32_domain(current->domain) && (cpsr&PSR_IT_MASK) )
+    if ( is_32bit_domain(current->domain) && (cpsr&PSR_IT_MASK) )
     {
         /* The ITSTATE[7:0] block is contained in CPSR[15:10],CPSR[26:25]
          *
@@ -1563,12 +1563,12 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
         advance_pc(regs, hsr);
         break;
     case HSR_EC_CP15_32:
-        if ( ! is_pv32_domain(current->domain) )
+        if ( ! is_32bit_domain(current->domain) )
             goto bad_trap;
         do_cp15_32(regs, hsr);
         break;
     case HSR_EC_CP15_64:
-        if ( ! is_pv32_domain(current->domain) )
+        if ( ! is_32bit_domain(current->domain) )
             goto bad_trap;
         do_cp15_64(regs, hsr);
         break;
@@ -1598,7 +1598,7 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
         inject_undef64_exception(regs, hsr.len);
         break;
     case HSR_EC_SYSREG:
-        if ( is_pv32_domain(current->domain) )
+        if ( is_32bit_domain(current->domain) )
             goto bad_trap;
         do_sysreg(regs, hsr);
         break;
diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c
index c82884f..1ceb8cb 100644
--- a/xen/arch/arm/vpsci.c
+++ b/xen/arch/arm/vpsci.c
@@ -33,7 +33,7 @@ int do_psci_cpu_on(uint32_t vcpuid, register_t entry_point)
         return PSCI_EINVAL;
 
     /* THUMB set is not allowed with 64-bit domain */
-    if ( is_pv64_domain(d) && is_thumb )
+    if ( is_64bit_domain(d) && is_thumb )
         return PSCI_EINVAL;
 
     if ( (ctxt = alloc_vcpu_guest_context()) == NULL )
@@ -47,7 +47,7 @@ int do_psci_cpu_on(uint32_t vcpuid, register_t entry_point)
     ctxt->ttbr0 = 0;
     ctxt->ttbr1 = 0;
     ctxt->ttbcr = 0; /* Defined Reset Value */
-    if ( is_pv32_domain(d) )
+    if ( is_32bit_domain(d) )
         ctxt->user_regs.cpsr = PSR_GUEST32_INIT;
 #ifdef CONFIG_ARM_64
     else
diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c
index e325f78..3d6a721 100644
--- a/xen/arch/arm/vtimer.c
+++ b/xen/arch/arm/vtimer.c
@@ -266,16 +266,16 @@ int vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr)
 
     switch (hsr.ec) {
     case HSR_EC_CP15_32:
-        if ( !is_pv32_domain(current->domain) )
+        if ( !is_32bit_domain(current->domain) )
             return 0;
         return vtimer_emulate_cp32(regs, hsr);
     case HSR_EC_CP15_64:
-        if ( !is_pv32_domain(current->domain) )
+        if ( !is_32bit_domain(current->domain) )
             return 0;
         return vtimer_emulate_cp64(regs, hsr);
 #ifdef CONFIG_ARM_64
     case HSR_EC_SYSREG:
-        if ( is_pv32_domain(current->domain) )
+        if ( is_32bit_domain(current->domain) )
             return 0;
         return vtimer_emulate_sysreg(regs, hsr);
 #endif
diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
index bc20a15..28c359a 100644
--- a/xen/include/asm-arm/domain.h
+++ b/xen/include/asm-arm/domain.h
@@ -76,14 +76,14 @@ struct hvm_domain
 
 #ifdef CONFIG_ARM_64
 enum domain_type {
-    DOMAIN_PV32,
-    DOMAIN_PV64,
+    DOMAIN_32BIT,
+    DOMAIN_64BIT,
 };
-#define is_pv32_domain(d) ((d)->arch.type == DOMAIN_PV32)
-#define is_pv64_domain(d) ((d)->arch.type == DOMAIN_PV64)
+#define is_32bit_domain(d) ((d)->arch.type == DOMAIN_32BIT)
+#define is_64bit_domain(d) ((d)->arch.type == DOMAIN_64BIT)
 #else
-#define is_pv32_domain(d) (1)
-#define is_pv64_domain(d) (0)
+#define is_32bit_domain(d) (1)
+#define is_64bit_domain(d) (0)
 #endif
 
 extern int dom0_11_mapping;
