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[50.57.142.19]) by mx.google.com with ESMTPS id z4si1629123vcp.24.2014.04.25.04.24.04 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 25 Apr 2014 04:24:05 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WdeDb-0004RM-UU; Fri, 25 Apr 2014 11:22:59 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WdeDa-0004PX-Cr for xen-devel@lists.xen.org; Fri, 25 Apr 2014 11:22:58 +0000 Received: from [85.158.143.35:10506] by server-3.bemta-4.messagelabs.com id B6/FF-13602-1954A535; Fri, 25 Apr 2014 11:22:57 +0000 X-Env-Sender: Ian.Campbell@citrix.com X-Msg-Ref: server-16.tower-21.messagelabs.com!1398424969!1000953!4 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 32221 invoked from network); 25 Apr 2014 11:22:55 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-16.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 25 Apr 2014 11:22:55 -0000 X-IronPort-AV: E=Sophos;i="4.97,926,1389744000"; d="scan'208";a="123461121" Received: from accessns.citrite.net (HELO FTLPEX01CL03.citrite.net) ([10.9.154.239]) by FTLPIPO02.CITRIX.COM with ESMTP; 25 Apr 2014 11:22:55 +0000 Received: from ukmail1.uk.xensource.com (10.80.16.128) by smtprelay.citrix.com (10.13.107.80) with Microsoft SMTP Server id 14.3.123.3; Fri, 25 Apr 2014 07:22:54 -0400 Received: from marilith-n13-p0.uk.xensource.com ([10.80.229.115] helo=localhost.localdomain) by ukmail1.uk.xensource.com with smtp (Exim 4.69) (envelope-from ) id 1WdeDV-000769-Hk; Fri, 25 Apr 2014 12:22:54 +0100 Received: by localhost.localdomain (sSMTP sendmail emulation); Fri, 25 Apr 2014 12:22:53 +0100 From: Ian Campbell To: Date: Fri, 25 Apr 2014 12:22:46 +0100 Message-ID: <1398424967-9306-7-git-send-email-ian.campbell@citrix.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1398424945.18537.424.camel@kazak.uk.xensource.com> References: <1398424945.18537.424.camel@kazak.uk.xensource.com> MIME-Version: 1.0 X-DLP: MIA1 Cc: ian.jackson@eu.citrix.com, julien.grall@linaro.org, tim@xen.org, Ian Campbell , stefano.stabellini@eu.citrix.com Subject: [Xen-devel] [PATCH v2 7/8] tools: arm: support up to (almost) 1TB of guest RAM X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ian.campbell@citrix.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: This creates a second bank of RAM starting at 8GB and potentially extending to the 1TB boundary, which is the limit imposed by our current use of a 3 level p2m with 2 pages at level 0 (2^40 bits). I've deliberately left a gap between the two banks just to exercise those code paths. The second bank is 1016GB in size which plus the 3GB below 4GB is 1019GB maximum guest RAM. At the point where the fact that this is slightly less than a full TB starts to become an issue for people then we can switch to a 4 level p2m, which would be needed to support guests larger than 1TB anyhow. Tested on 32-bit with 1, 4 and 6GB guests. Anything more than ~3GB requires an LPAE enabled kernel, or a 64-bit guest. Signed-off-by: Ian Campbell Acked-by: Julien Grall --- tools/libxc/xc_dom_arm.c | 16 +++++++++++++--- tools/libxl/libxl_arm.c | 22 +++++++++++++++++++--- xen/include/public/arch-arm.h | 9 ++++++--- 3 files changed, 38 insertions(+), 9 deletions(-) diff --git a/tools/libxc/xc_dom_arm.c b/tools/libxc/xc_dom_arm.c index 61f9ba6..7216d2a 100644 --- a/tools/libxc/xc_dom_arm.c +++ b/tools/libxc/xc_dom_arm.c @@ -286,12 +286,18 @@ int arch_setup_meminit(struct xc_dom_image *dom) uint64_t modbase; /* Convenient */ - const uint64_t ramsize = dom->total_pages << XC_PAGE_SHIFT; + const uint64_t ramsize = (uint64_t)dom->total_pages << XC_PAGE_SHIFT; - const uint64_t ram0size = ramsize; + const uint64_t ram0size = + ramsize > GUEST_RAM0_SIZE ? GUEST_RAM0_SIZE : ramsize; const uint64_t ram0end = GUEST_RAM0_BASE + ram0size; + const uint64_t ram1size = + ramsize > ram0size ? ramsize - ram0size : 0; + const uint64_t ram1end = GUEST_RAM1_BASE + ram1size; - const xen_pfn_t p2m_size = (ram0end - GUEST_RAM0_BASE) >> XC_PAGE_SHIFT; + const xen_pfn_t p2m_size = ram1size ? + (ram1end - GUEST_RAM0_BASE) >> XC_PAGE_SHIFT : + (ram0end - GUEST_RAM0_BASE) >> XC_PAGE_SHIFT; const uint64_t kernbase = dom->kernel_seg.vstart; const uint64_t kernend = ROUNDUP(dom->kernel_seg.vend, 21/*2MB*/); @@ -337,6 +343,10 @@ int arch_setup_meminit(struct xc_dom_image *dom) GUEST_RAM0_BASE >> XC_PAGE_SHIFT, ram0size >> XC_PAGE_SHIFT))) return rc; + if ((rc = populate_guest_memory(dom, + GUEST_RAM1_BASE >> XC_PAGE_SHIFT, + ram1size >> XC_PAGE_SHIFT))) + return rc; /* * We try to place dtb+initrd at 128MB or if we have less RAM diff --git a/tools/libxl/libxl_arm.c b/tools/libxl/libxl_arm.c index 215ef9e..1af6b4a 100644 --- a/tools/libxl/libxl_arm.c +++ b/tools/libxl/libxl_arm.c @@ -255,8 +255,8 @@ static int make_psci_node(libxl__gc *gc, void *fdt) return 0; } -static int make_memory_node(libxl__gc *gc, void *fdt, - uint64_t base, uint64_t size) +static int make_one_memory_node(libxl__gc *gc, void *fdt, + uint64_t base, uint64_t size) { int res; const char *name = GCSPRINTF("memory@%"PRIx64, base); @@ -277,6 +277,23 @@ static int make_memory_node(libxl__gc *gc, void *fdt, return 0; } +static int make_memory_node(libxl__gc *gc, void *fdt, uint64_t size) +{ + int res; + /* This had better match libxc's arch_setup_meminit... */ + const uint64_t size0 = size > GUEST_RAM0_SIZE ? GUEST_RAM0_SIZE : size; + const uint64_t size1 = size > GUEST_RAM0_SIZE ? size - size0 : 0; + + res = make_one_memory_node(gc, fdt, GUEST_RAM0_BASE, size0); + if (res) return res; + if (size1) { + res = make_one_memory_node(gc, fdt, GUEST_RAM1_BASE, size1); + if (res) return res; + } + + return 0; +} + static int make_intc_node(libxl__gc *gc, void *fdt, uint64_t gicd_base, uint64_t gicd_size, uint64_t gicc_base, uint64_t gicc_size) @@ -490,7 +507,6 @@ next_resize: FDT( make_psci_node(gc, fdt) ); FDT( make_memory_node(gc, fdt, - dom->rambase_pfn << XC_PAGE_SHIFT, info->target_memkb * 1024) ); FDT( make_intc_node(gc, fdt, GUEST_GICD_BASE, GUEST_GICD_SIZE, diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index c4f4990..3f457f1 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -374,12 +374,15 @@ typedef uint64_t xen_callback_t; #define GUEST_MAGIC_BASE 0x39000000ULL -#define GUEST_RAM0_BASE 0x40000000ULL /* 3GB of RAM @ 1GB */ +#define GUEST_RAM0_BASE 0x40000000ULL /* 3GB of low RAM @ 1GB */ #define GUEST_RAM0_SIZE 0xc0000000ULL +#define GUEST_RAM1_BASE 0x0200000000ULL /* 1016GB of RAM @ 8GB */ +#define GUEST_RAM1_SIZE 0xfe00000000ULL + #define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */ -/* Largest amount of actual RAM, not including holes */ -#define GUEST_RAM_MAX (GUEST_RAM0_SIZE) + /* Largest amount of actual RAM, not including holes */ +#define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE) /* Interrupts */ #define GUEST_TIMER_VIRT_PPI 27