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[50.57.142.19]) by mx.google.com with ESMTPS id ls10si377005vec.172.2014.05.08.14.24.03 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 08 May 2014 14:24:04 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WiVl9-0000Zk-DT; Thu, 08 May 2014 21:21:43 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WiVl8-0000ZI-7x for xen-devel@lists.xen.org; Thu, 08 May 2014 21:21:42 +0000 Received: from [85.158.143.35:52590] by server-3.bemta-4.messagelabs.com id 2F/09-13602-565FB635; Thu, 08 May 2014 21:21:41 +0000 X-Env-Sender: w1.huang@samsung.com X-Msg-Ref: server-12.tower-21.messagelabs.com!1399584097!3749558!2 X-Originating-IP: [203.254.224.24] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMjAzLjI1NC4yMjQuMjQgPT4gMzY1MDA2\n X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 22752 invoked from network); 8 May 2014 21:21:40 -0000 Received: from mailout1.samsung.com (HELO mailout1.samsung.com) (203.254.224.24) by server-12.tower-21.messagelabs.com with DES-CBC3-SHA encrypted SMTP; 8 May 2014 21:21:40 -0000 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N5900ARMY04A590@mailout1.samsung.com> for xen-devel@lists.xen.org; Fri, 09 May 2014 06:21:40 +0900 (KST) X-AuditID: cbfee61a-b7f2b6d000006c4d-4e-536bf5642d22 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 6C.22.27725.465FB635; Fri, 09 May 2014 06:21:40 +0900 (KST) Received: from weihp.spa.sarc.sas ([105.140.31.10]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N59002IGXZLDK90@mmp1.samsung.com>; Fri, 09 May 2014 06:21:40 +0900 (KST) From: Wei Huang To: xen-devel@lists.xen.org Date: Thu, 08 May 2014 16:18:25 -0500 Message-id: <1399583908-21755-4-git-send-email-w1.huang@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1399583908-21755-1-git-send-email-w1.huang@samsung.com> References: <1399583908-21755-1-git-send-email-w1.huang@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOLMWRmVeSWpSXmKPExsVy+t9jAd2Ur9nBBlvWclgsfryL3eJNbweL xcVrr5gsbvTeYrP4uechm8X0P3fYLPZ9XsVi8fPORUaLr82rGC1en/vIbLHk42IWi45/09gc eDxeT57A6LH9iYjHnWt72DyO7v7N5NG3ZRWjx/otV1k8Tt+axRbAHsVlk5Kak1mWWqRvl8CV MW1zD0vBH/mK9uO72BoYb4t1MXJySAiYSGw7uYgdwhaTuHBvPVsXIxeHkMAiRomuvUvZIZxm Jonelw+YQarYBNQkTl38zwJiiwhIS1z7fJkRpIhZ4COjxOFZfWAJYQEviR/9r8FsFgFVictT pjKC2LwCLhJ/tjUADeIAWqcgMWeSDUiYU8BV4v60eWAlQkAlr669Y53AyLuAkWEVo2hqQXJB cVJ6rqFecWJucWleul5yfu4mRnBwPpPawbiyweIQowAHoxIP74sp2cFCrIllxZW5hxglOJiV RHhfLAMK8aYkVlalFuXHF5XmpBYfYpTmYFES5z3Qah0oJJCeWJKanZpakFoEk2Xi4JRqYFzT pVRq/OeTz4QZdgVGdQwZS09fVOIO/rJtwYSmjwfmNiz56Gy+S2kad2Z6SKbQ8UmFO76/K81r YHeLmh54z17r6RsGkdrWuNkWaWkdpSJM17mes3/lnS3g2lFyrOC+QXP7PYcZkZWr2D6UTJzD fGo158m3l/7yXREy+GZWFCchtWDG7RzJdUosxRmJhlrMRcWJAEoJ9sdKAgAA Cc: keir@xen.org, ian.campbell@citrix.com, stefano.stabellini@eu.citrix.com, andrew.cooper3@citrix.com, julien.grall@linaro.org, tim@xen.org, jaeyong.yoo@samsung.com, jbeulich@suse.com, ian.jackson@eu.citrix.com, yjhyun.yoo@samsung.com Subject: [Xen-devel] [RFC v3 3/6] xen/arm: Add save/restore support for ARM arch timer X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: w1.huang@samsung.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: This patch implements a save/resore support for ARM architecture timer. Signed-off-by: Evgeny Fedotov Signed-off-by: Wei Huang --- xen/arch/arm/vtimer.c | 90 ++++++++++++++++++++++++++++++++ xen/include/public/arch-arm/hvm/save.h | 16 +++++- 2 files changed, 105 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c index b93153e..6576408 100644 --- a/xen/arch/arm/vtimer.c +++ b/xen/arch/arm/vtimer.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -285,6 +286,95 @@ int vtimer_emulate(struct cpu_user_regs *regs, union hsr hsr) } } +/* Save timer info to support save/restore */ +static int hvm_timer_save(struct domain *d, hvm_domain_context_t *h) +{ + struct hvm_arm_timer ctxt; + struct vcpu *v; + struct vtimer *t; + int i; + int rc = 0; + + /* Save the state of vtimer and ptimer */ + for_each_vcpu( d, v ) + { + t = &v->arch.virt_timer; + + for ( i = 0; i < ARM_TIMER_TYPE_COUNT; i++ ) + { + ctxt.cval = t->cval; + ctxt.ctl = t->ctl; + + switch ( i ) + { + case ARM_TIMER_TYPE_PHYS: + ctxt.vtb_offset = d->arch.phys_timer_base.offset; + ctxt.type = ARM_TIMER_TYPE_PHYS; + break; + case ARM_TIMER_TYPE_VIRT: + ctxt.vtb_offset = d->arch.virt_timer_base.offset; + ctxt.type = ARM_TIMER_TYPE_VIRT; + default: + rc = -EINVAL; + break; + } + + if ( (rc = hvm_save_entry(TIMER, v->vcpu_id, h, &ctxt)) != 0 ) + return rc; + + t = &v->arch.phys_timer; + } + } + + return rc; +} + +/* Restore timer info from context to support save/restore */ +static int hvm_timer_load(struct domain *d, hvm_domain_context_t *h) +{ + int vcpuid; + struct hvm_arm_timer ctxt; + struct vcpu *v; + struct vtimer *t = NULL; + int rc = 0; + + /* Which vcpu is this? */ + vcpuid = hvm_load_instance(h); + + if ( vcpuid >= d->max_vcpus || (v = d->vcpu[vcpuid]) == NULL ) + { + dprintk(XENLOG_ERR, "HVM restore: dom%u has no vcpu%u\n", + d->domain_id, vcpuid); + return -EINVAL; + } + + if ( hvm_load_entry(TIMER, h, &ctxt) != 0 ) + return -EINVAL; + + switch ( ctxt.type ) + { + case ARM_TIMER_TYPE_PHYS: + t = &v->arch.phys_timer; + d->arch.phys_timer_base.offset = ctxt.vtb_offset; + break; + case ARM_TIMER_TYPE_VIRT: + t = &v->arch.virt_timer; + d->arch.virt_timer_base.offset = ctxt.vtb_offset; + break; + default: + rc = -EINVAL; + break; + } + + t->cval = ctxt.cval; + t->ctl = ctxt.ctl; + t->v = v; + + return rc; +} + +HVM_REGISTER_SAVE_RESTORE(TIMER, hvm_timer_save, hvm_timer_load, 2, + HVMSR_PER_VCPU); /* * Local variables: * mode: C diff --git a/xen/include/public/arch-arm/hvm/save.h b/xen/include/public/arch-arm/hvm/save.h index 421a6f6..8679bfd 100644 --- a/xen/include/public/arch-arm/hvm/save.h +++ b/xen/include/public/arch-arm/hvm/save.h @@ -72,10 +72,24 @@ struct hvm_arm_gich_v2 }; DECLARE_HVM_SAVE_TYPE(GICH_V2, 3, struct hvm_arm_gich_v2); +/* Two ARM timers (physical and virtual) are saved */ +#define ARM_TIMER_TYPE_VIRT 0 +#define ARM_TIMER_TYPE_PHYS 1 +#define ARM_TIMER_TYPE_COUNT 2 /* total count */ + +struct hvm_arm_timer +{ + uint64_t vtb_offset; + uint32_t ctl; + uint64_t cval; + uint32_t type; +}; +DECLARE_HVM_SAVE_TYPE(TIMER, 4, struct hvm_arm_timer); + /* * Largest type-code in use */ -#define HVM_SAVE_CODE_MAX 3 +#define HVM_SAVE_CODE_MAX 4 #endif