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[50.57.142.19]) by mx.google.com with ESMTPS id n4si43586877igp.56.2014.07.07.08.31.21 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 07 Jul 2014 08:31:22 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1X4Ar5-0000Xl-69; Mon, 07 Jul 2014 15:29:23 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1X4Ar4-0000Xg-Es for xen-devel@lists.xenproject.org; Mon, 07 Jul 2014 15:29:22 +0000 Received: from [85.158.139.211:6468] by server-2.bemta-5.messagelabs.com id AD/43-01647-1DCBAB35; Mon, 07 Jul 2014 15:29:21 +0000 X-Env-Sender: julien.grall@linaro.org X-Msg-Ref: server-2.tower-206.messagelabs.com!1404746961!14115511!1 X-Originating-IP: [209.85.212.177] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.11.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 8486 invoked from network); 7 Jul 2014 15:29:21 -0000 Received: from mail-wi0-f177.google.com (HELO mail-wi0-f177.google.com) (209.85.212.177) by server-2.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 7 Jul 2014 15:29:21 -0000 Received: by mail-wi0-f177.google.com with SMTP id r20so7122121wiv.4 for ; Mon, 07 Jul 2014 08:29:20 -0700 (PDT) X-Received: by 10.180.100.200 with SMTP id fa8mr36822359wib.23.1404746960666; Mon, 07 Jul 2014 08:29:20 -0700 (PDT) Received: from belegaer.uk.xensource.com ([185.25.64.249]) by mx.google.com with ESMTPSA id 10sm78348977wjx.26.2014.07.07.08.29.18 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 07 Jul 2014 08:29:19 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 7 Jul 2014 16:29:15 +0100 Message-Id: <1404746955-20807-1-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 Cc: stefano.stabellini@citrix.com, Julien Grall , tim@xen.org, ian.campbell@citrix.com Subject: [Xen-devel] [PATCH] xen/arm: Don't save/restore context for idle VCPU X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: When an idle VCPU is running, Xen will never exit the hypervisor mode. Futhermore, some part of the VCPU/domain initialization is already skipped for them to avoid memory consumption. Actually each save/restore functions are checking themself if the vcpu is an idle one or not. We can safely skipped the context switch in one place and gain a bit of time when we {,un}schedule idle VCPU. This is because the saving part will take care of disabling anything related to guest (such as GICv). Also replace every check of and idle VCPU in save/restore functions by an ASSERT, to know if someone is calling them with an idle VCPU in argument. Signed-off-by: Julien Grall Acked-by: Ian Campbell --- xen/arch/arm/domain.c | 14 ++++++++++++++ xen/arch/arm/gic.c | 5 ++--- xen/arch/arm/vtimer.c | 6 ++---- 3 files changed, 18 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 829d49f..bbf0162 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -60,6 +60,12 @@ void idle_loop(void) static void ctxt_switch_from(struct vcpu *p) { + /* When the idle VCPU is running, Xen will always stay in hypervisor + * mode. Therefore we don't need to save the context of an idle VCPU. + */ + if ( is_idle_vcpu(p) ) + goto end_context; + p2m_save_state(p); /* CP 15 */ @@ -132,11 +138,19 @@ static void ctxt_switch_from(struct vcpu *p) gic_save_state(p); isb(); + +end_context: context_saved(p); } static void ctxt_switch_to(struct vcpu *n) { + /* When the idle VCPU is running, Xen will always stay in hypervisor + * mode. Therefore we don't need to restore the context of an idle VCPU. + */ + if ( is_idle_vcpu(n) ) + return; + p2m_restore_state(n); WRITE_SYSREG32(n->domain->arch.vpidr, VPIDR_EL2); diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index e1e27b35..83b004c 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -69,6 +69,7 @@ unsigned int gic_number_lines(void) void gic_save_state(struct vcpu *v) { ASSERT(!local_irq_is_enabled()); + ASSERT(!is_idle_vcpu(v)); /* No need for spinlocks here because interrupts are disabled around * this call and it only accesses struct vcpu fields that cannot be @@ -82,9 +83,7 @@ void gic_save_state(struct vcpu *v) void gic_restore_state(struct vcpu *v) { ASSERT(!local_irq_is_enabled()); - - if ( is_idle_vcpu(v) ) - return; + ASSERT(!is_idle_vcpu(v)); this_cpu(lr_mask) = v->arch.lr_mask; gic_hw_ops->restore_state(v); diff --git a/xen/arch/arm/vtimer.c b/xen/arch/arm/vtimer.c index 690657b..2e95ceb 100644 --- a/xen/arch/arm/vtimer.c +++ b/xen/arch/arm/vtimer.c @@ -94,8 +94,7 @@ void vcpu_timer_destroy(struct vcpu *v) int virt_timer_save(struct vcpu *v) { - if ( is_idle_domain(v->domain) ) - return 0; + ASSERT(!is_idle_vcpu(v)); v->arch.virt_timer.ctl = READ_SYSREG32(CNTV_CTL_EL0); WRITE_SYSREG32(v->arch.virt_timer.ctl & ~CNTx_CTL_ENABLE, CNTV_CTL_EL0); @@ -111,8 +110,7 @@ int virt_timer_save(struct vcpu *v) int virt_timer_restore(struct vcpu *v) { - if ( is_idle_domain(v->domain) ) - return 0; + ASSERT(!is_idle_vcpu(v)); stop_timer(&v->arch.virt_timer.timer); migrate_timer(&v->arch.virt_timer.timer, v->processor);