From patchwork Wed Oct 15 03:07:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: wangyijing X-Patchwork-Id: 38750 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f200.google.com (mail-wi0-f200.google.com [209.85.212.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 4637420973 for ; Wed, 15 Oct 2014 02:31:39 +0000 (UTC) Received: by mail-wi0-f200.google.com with SMTP id h11sf275878wiw.3 for ; Tue, 14 Oct 2014 19:31:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:date:message-id:in-reply-to :references:mime-version:cc:subject:precedence:list-id :list-unsubscribe:list-post:list-help:list-subscribe:sender :errors-to:x-original-sender:x-original-authentication-results :mailing-list:list-archive:content-type:content-transfer-encoding; bh=B6rBJblSXFlGaH12wUfJ2jhhU2L61jwrgvyPujRDRi0=; b=Q9t86QxTVVpoJdNDwL8cH8BDNjvI46yJcAvnqnq3MNXqe/WDwgw+f9ggMa7cYRkWtH uD6s8urOtV+TQ/ps7WtglrHDfYdenkU/+5UYk5s+QxR2I0X8H0v4UOVQ5r7wmXqQabY1 4vi+hMq9GZSmi7Zo1hdmIeDcw6aEeyBbzs7XEeelQtynJX6QjnQpuMuPmJJkzA9Zr8Lr EZflAGnbSYoWmj6AXXhAkcJEiwyadsQk0LN0+ogWgvrZWTrPhw97V4WnQ3avDOPfDc1p S8jYV/W7uAqwj/lNJfr9KwC5o9RWeLeYPr9JBMet7+McKUsl/1gbLAUKZSqpCgNwEqAW sFrw== X-Gm-Message-State: ALoCoQm7WKuFg3+VGWBRugrUpBjUROuVfn2vV4PS/Zr3Nugk/lveGvFO7Ic6BUKuk4RIw2EfRogO X-Received: by 10.180.90.115 with SMTP id bv19mr1584324wib.1.1413340298357; Tue, 14 Oct 2014 19:31:38 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.29.5 with SMTP id f5ls8686lah.62.gmail; Tue, 14 Oct 2014 19:31:37 -0700 (PDT) X-Received: by 10.153.7.170 with SMTP id dd10mr9159775lad.45.1413340297924; Tue, 14 Oct 2014 19:31:37 -0700 (PDT) Received: from mail-la0-f45.google.com (mail-la0-f45.google.com [209.85.215.45]) by mx.google.com with ESMTPS id lb6si17029303lac.111.2014.10.14.19.31.37 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 14 Oct 2014 19:31:37 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) client-ip=209.85.215.45; Received: by mail-la0-f45.google.com with SMTP id q1so246002lam.32 for ; Tue, 14 Oct 2014 19:31:37 -0700 (PDT) X-Received: by 10.152.28.227 with SMTP id e3mr9334846lah.54.1413340297802; Tue, 14 Oct 2014 19:31:37 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.84.229 with SMTP id c5csp517715lbz; Tue, 14 Oct 2014 19:31:37 -0700 (PDT) X-Received: by 10.221.51.71 with SMTP id vh7mr9151133vcb.27.1413340296554; Tue, 14 Oct 2014 19:31:36 -0700 (PDT) Received: from lists.xen.org (lists.xen.org. [50.57.142.19]) by mx.google.com with ESMTPS id d1si16669805vds.104.2014.10.14.19.31.36 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 14 Oct 2014 19:31:36 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XeELx-00080m-D6; Wed, 15 Oct 2014 02:30:17 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XeELu-0007zy-QT for xen-devel@lists.xenproject.org; Wed, 15 Oct 2014 02:30:15 +0000 Received: from [85.158.143.35:31566] by server-1.bemta-4.messagelabs.com id 99/47-05872-63CDD345; Wed, 15 Oct 2014 02:30:14 +0000 X-Env-Sender: wangyijing@huawei.com X-Msg-Ref: server-13.tower-21.messagelabs.com!1413340209!5653983!1 X-Originating-IP: [119.145.14.65] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTE5LjE0NS4xNC42NSA9PiA3NzQ2Mw==\n X-StarScan-Received: X-StarScan-Version: 6.12.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 15941 invoked from network); 15 Oct 2014 02:30:12 -0000 Received: from szxga02-in.huawei.com (HELO szxga02-in.huawei.com) (119.145.14.65) by server-13.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 15 Oct 2014 02:30:12 -0000 Received: from 172.24.2.119 (EHLO szxeml412-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CAT35394; Wed, 15 Oct 2014 10:25:48 +0800 (CST) Received: from localhost.localdomain (10.175.100.166) by szxeml412-hub.china.huawei.com (10.82.67.91) with Microsoft SMTP Server id 14.3.158.1; Wed, 15 Oct 2014 10:25:39 +0800 From: Yijing Wang To: Bjorn Helgaas Date: Wed, 15 Oct 2014 11:07:03 +0800 Message-ID: <1413342435-7876-16-git-send-email-wangyijing@huawei.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1413342435-7876-1-git-send-email-wangyijing@huawei.com> References: <1413342435-7876-1-git-send-email-wangyijing@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected Cc: linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-pci@vger.kernel.org, Bharat.Bhushan@freescale.com, Yijing Wang , Thierry Reding , sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, Russell King , Michael Ellerman , Joerg Roedel , x86@kernel.org, Sebastian Ott , Benjamin Herrenschmidt , xen-devel@lists.xenproject.org, arnab.basu@freescale.com, Liviu Dudau , Arnd Bergmann , Chris Metcalf , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Xinwei Hu , Tony Luck , Sergei Shtylyov , linux-kernel@vger.kernel.org, Ralf Baechle , iommu@lists.linux-foundation.org, David Vrabel , Wuyun , linuxppc-dev@lists.ozlabs.org, "David S. Miller" , Lucas Stach Subject: [Xen-devel] [PATCH v3 15/27] x86/MSI: Remove unused MSI weak arch functions X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: wangyijing@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Now we can clean up MSI weak arch functions in x86. Signed-off-by: Yijing Wang --- arch/x86/include/asm/pci.h | 5 +---- arch/x86/include/asm/x86_init.h | 4 ---- arch/x86/kernel/apic/io_apic.c | 21 +++++---------------- arch/x86/kernel/x86_init.c | 24 ------------------------ 4 files changed, 6 insertions(+), 48 deletions(-) diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index f41b58a..3a5cf19 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -108,14 +108,11 @@ extern void pci_iommu_alloc(void); #ifdef CONFIG_PCI_MSI /* implemented in arch/x86/kernel/apic/io_apic. */ struct msi_desc; -int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); -void native_teardown_msi_irq(unsigned int irq); -void native_restore_msi_irqs(struct pci_dev *dev); +void native_teardown_msi_irq(struct msi_chip *chip, unsigned int irq); int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, unsigned int irq_base, unsigned int irq_offset); extern struct msi_chip *x86_msi_chip; #else -#define native_setup_msi_irqs NULL #define native_teardown_msi_irq NULL #endif diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h index f58a9c7..2514f67 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -174,13 +174,9 @@ struct pci_dev; struct msi_msg; struct x86_msi_ops { - int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type); void (*compose_msi_msg)(struct pci_dev *dev, unsigned int irq, unsigned int dest, struct msi_msg *msg, u8 hpet_id); - void (*teardown_msi_irq)(unsigned int irq); - void (*teardown_msi_irqs)(struct pci_dev *dev); - void (*restore_msi_irqs)(struct pci_dev *dev); int (*setup_hpet_msi)(unsigned int irq, unsigned int id); }; diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index ec79b38..11d353f 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -3200,7 +3200,8 @@ int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, return 0; } -int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +static int native_setup_msi_irqs(struct msi_chip *chip, + struct pci_dev *dev, int nvec, int type) { struct msi_desc *msidesc; unsigned int irq; @@ -3227,26 +3228,14 @@ int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) return 0; } -static int __native_setup_msi_irqs(struct msi_chip *chip, - struct pci_dev *dev, int nvec, int type) -{ - return native_setup_msi_irqs(dev, nvec, type); -} - -void native_teardown_msi_irq(unsigned int irq) +void native_teardown_msi_irq(struct msi_chip *chip, unsigned int irq) { irq_free_hwirq(irq); } -static void __native_teardown_msi_irq(struct msi_chip *chip, - unsigned int irq) -{ - native_teardown_msi_irq(irq); -} - static struct msi_chip native_msi_chip = { - .setup_irqs = __native_setup_msi_irqs, - .teardown_irq = __native_teardown_msi_irq, + .setup_irqs = native_setup_msi_irqs, + .teardown_irq = native_teardown_msi_irq, }; struct msi_chip *x86_msi_chip = &native_msi_chip; diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index 234b072..cc32568 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -110,34 +110,10 @@ EXPORT_SYMBOL_GPL(x86_platform); #if defined(CONFIG_PCI_MSI) struct x86_msi_ops x86_msi = { - .setup_msi_irqs = native_setup_msi_irqs, .compose_msi_msg = native_compose_msi_msg, - .teardown_msi_irq = native_teardown_msi_irq, - .teardown_msi_irqs = default_teardown_msi_irqs, - .restore_msi_irqs = default_restore_msi_irqs, .setup_hpet_msi = default_setup_hpet_msi, }; -/* MSI arch specific hooks */ -int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) -{ - return x86_msi.setup_msi_irqs(dev, nvec, type); -} - -void arch_teardown_msi_irqs(struct pci_dev *dev) -{ - x86_msi.teardown_msi_irqs(dev); -} - -void arch_teardown_msi_irq(unsigned int irq) -{ - x86_msi.teardown_msi_irq(irq); -} - -void arch_restore_msi_irqs(struct pci_dev *dev) -{ - x86_msi.restore_msi_irqs(dev); -} #endif struct x86_io_apic_ops x86_io_apic_ops = {