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[50.57.142.19]) by mx.google.com with ESMTPS id cs9si1685039vdb.63.2015.04.01.09.51.22 (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 01 Apr 2015 09:51:23 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YdLpi-0002BB-4L; Wed, 01 Apr 2015 16:49:38 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YdLpg-0002Ad-5z for xen-devel@lists.xenproject.org; Wed, 01 Apr 2015 16:49:36 +0000 Received: from [85.158.137.68] by server-9.bemta-3.messagelabs.com id DF/17-26324-F912C155; Wed, 01 Apr 2015 16:49:35 +0000 X-Env-Sender: julien.grall@citrix.com X-Msg-Ref: server-9.tower-31.messagelabs.com!1427906973!9416872!1 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 6.13.6; banners=-,-,- X-VirusChecked: Checked Received: (qmail 3252 invoked from network); 1 Apr 2015 16:49:34 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-9.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 1 Apr 2015 16:49:34 -0000 X-IronPort-AV: E=Sophos;i="5.11,504,1422921600"; d="scan'208";a="248623935" From: Julien Grall To: Date: Wed, 1 Apr 2015 17:21:44 +0100 Message-ID: <1427905307-23749-12-git-send-email-julien.grall@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1427905307-23749-1-git-send-email-julien.grall@citrix.com> References: <1427905307-23749-1-git-send-email-julien.grall@citrix.com> MIME-Version: 1.0 X-DLP: MIA2 Cc: stefano.stabellini@citrix.com, Julien Grall , tim@xen.org, ian.campbell@citrix.com, Stefano Stabellini Subject: [Xen-devel] [PATCH v5 p1 11/14] xen/arm: gic: Add sanity checks gic_route_irq_to_guest X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.47 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: From: Julien Grall With the addition of interrupt assignment to guest, we need to make sure the guest can't blow up the interrupt management in Xen. Before associating the IRQ to a vIRQ we need to make sure: - the vIRQ is not already associated to another IRQ - the guest didn't enable the vIRQ Signed-off-by: Julien Grall Acked-by: Stefano Stabellini Acked-by: Ian Campbell --- Changes in v5: - Add Ian's ack Changes in v4: - Move functional change (GIC_IRQ_PRI -> priority) in a separate patch. - Split the 2 conditions of the ASSERT in 2 different ASSERTs - Typoes - Add Stefano's ack Changes in v3: - Patch added --- xen/arch/arm/gic.c | 35 +++++++++++++++++++++++++++-------- xen/arch/arm/irq.c | 12 ++++++++++-- xen/include/asm-arm/gic.h | 7 +++---- 3 files changed, 40 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index fe8f69b..2709415 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -126,22 +126,41 @@ void gic_route_irq_to_xen(struct irq_desc *desc, const cpumask_t *cpu_mask, /* Program the GIC to route an interrupt to a guest * - desc.lock must be held */ -void gic_route_irq_to_guest(struct domain *d, unsigned int virq, - struct irq_desc *desc, - const cpumask_t *cpu_mask, unsigned int priority) +int gic_route_irq_to_guest(struct domain *d, unsigned int virq, + struct irq_desc *desc, unsigned int priority) { - struct pending_irq *p; + unsigned long flags; + /* Use vcpu0 to retrieve the pending_irq struct. Given that we only + * route SPIs to guests, it doesn't make any difference. */ + struct vcpu *v_target = vgic_get_target_vcpu(d->vcpu[0], virq); + struct vgic_irq_rank *rank = vgic_rank_irq(v_target, virq); + struct pending_irq *p = irq_to_pending(v_target, virq); + int res = -EBUSY; + ASSERT(spin_is_locked(&desc->lock)); + /* Caller has already checked that the IRQ is an SPI */ + ASSERT(virq >= 32); + ASSERT(virq < vgic_num_irqs(d)); + + vgic_lock_rank(v_target, rank, flags); + + if ( p->desc || + /* The VIRQ should not be already enabled by the guest */ + test_bit(GIC_IRQ_GUEST_ENABLED, &p->status) ) + goto out; desc->handler = gic_hw_ops->gic_guest_irq_type; set_bit(_IRQ_GUEST, &desc->status); - gic_set_irq_properties(desc, cpumask_of(smp_processor_id()), GIC_PRI_IRQ); + gic_set_irq_properties(desc, cpumask_of(v_target->processor), GIC_PRI_IRQ); - /* Use vcpu0 to retrieve the pending_irq struct. Given that we only - * route SPIs to guests, it doesn't make any difference. */ - p = irq_to_pending(d->vcpu[0], virq); p->desc = desc; + res = 0; + +out: + vgic_unlock_rank(v_target, rank, flags); + + return res; } int gic_irq_xlate(const u32 *intspec, unsigned int intsize, diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index 4c3e381..b2ddf6b 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -492,14 +492,22 @@ int route_irq_to_guest(struct domain *d, unsigned int virq, if ( retval ) goto out; - gic_route_irq_to_guest(d, virq, desc, cpumask_of(smp_processor_id()), - GIC_PRI_IRQ); + retval = gic_route_irq_to_guest(d, virq, desc, GIC_PRI_IRQ); + spin_unlock_irqrestore(&desc->lock, flags); + + if ( retval ) + { + release_irq(desc->irq, info); + goto free_info; + } + return 0; out: spin_unlock_irqrestore(&desc->lock, flags); xfree(action); +free_info: xfree(info); return retval; diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index bb2a922..ef4bf9a 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -216,10 +216,9 @@ extern enum gic_version gic_hw_version(void); /* Program the GIC to route an interrupt */ extern void gic_route_irq_to_xen(struct irq_desc *desc, const cpumask_t *cpu_mask, unsigned int priority); -extern void gic_route_irq_to_guest(struct domain *, unsigned int virq, - struct irq_desc *desc, - const cpumask_t *cpu_mask, - unsigned int priority); +extern int gic_route_irq_to_guest(struct domain *, unsigned int virq, + struct irq_desc *desc, + unsigned int priority); extern void gic_inject(void); extern void gic_clear_pending_irqs(struct vcpu *v);