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[50.57.142.19]) by mx.google.com with ESMTPS id 137si2360805qhy.93.2015.04.01.09.50.01 (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 01 Apr 2015 09:50:01 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YdLoK-0001h6-Ld; Wed, 01 Apr 2015 16:48:12 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YdLoI-0001gc-W1 for xen-devel@lists.xenproject.org; Wed, 01 Apr 2015 16:48:11 +0000 Received: from [85.158.139.211] by server-16.bemta-5.messagelabs.com id 6D/81-25453-A412C155; Wed, 01 Apr 2015 16:48:10 +0000 X-Env-Sender: julien.grall@citrix.com X-Msg-Ref: server-4.tower-206.messagelabs.com!1427906882!13297215!4 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 6.13.6; banners=-,-,- X-VirusChecked: Checked Received: (qmail 10996 invoked from network); 1 Apr 2015 16:48:09 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-4.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 1 Apr 2015 16:48:09 -0000 X-IronPort-AV: E=Sophos;i="5.11,504,1422921600"; d="scan'208";a="250401401" From: Julien Grall To: Date: Wed, 1 Apr 2015 17:21:46 +0100 Message-ID: <1427905307-23749-14-git-send-email-julien.grall@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1427905307-23749-1-git-send-email-julien.grall@citrix.com> References: <1427905307-23749-1-git-send-email-julien.grall@citrix.com> MIME-Version: 1.0 X-DLP: MIA2 Cc: stefano.stabellini@citrix.com, Julien Grall , tim@xen.org, ian.campbell@citrix.com Subject: [Xen-devel] [PATCH v5 p1 13/14] xen/arm: vgic: Correctly calculate GICD_TYPER.ITLinesNumber X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: From: Julien Grall The formula of GICD_TYPER.ITLinesNumber is 32(N + 1). As the number of SPIs suppported by the domain may not be a multiple of 32, we have to round up the number before using it. At the same time remove the mask GICD_TYPE_LINES which is pointless. Signed-off-by: Julien Grall Acked-by: Ian Campbell --- Changes in v5: - Add Ian's ack Changes in v4: - Patch added --- xen/arch/arm/vgic-v2.c | 2 +- xen/arch/arm/vgic-v3.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c index 40619b2..b5a8f29 100644 --- a/xen/arch/arm/vgic-v2.c +++ b/xen/arch/arm/vgic-v2.c @@ -55,7 +55,7 @@ static int vgic_v2_distr_mmio_read(struct vcpu *v, mmio_info_t *info) /* No secure world support for guests. */ vgic_lock(v); *r = ( ((v->domain->max_vcpus - 1) << GICD_TYPE_CPUS_SHIFT) ) - |( ((v->domain->arch.vgic.nr_spis / 32)) & GICD_TYPE_LINES ); + | DIV_ROUND_UP(v->domain->arch.vgic.nr_spis, 32); vgic_unlock(v); return 1; case GICD_IIDR: diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 81fbb26..45a46c3 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -700,7 +700,7 @@ static int vgic_v3_distr_mmio_read(struct vcpu *v, mmio_info_t *info) if ( dabt.size != DABT_WORD ) goto bad_width; /* No secure world support for guests. */ *r = ((ncpus - 1) << GICD_TYPE_CPUS_SHIFT | - ((v->domain->arch.vgic.nr_spis / 32) & GICD_TYPE_LINES)); + DIV_ROUND_UP(v->domain->arch.vgic.nr_spis, 32)); *r |= (irq_bits - 1) << GICD_TYPE_ID_BITS_SHIFT;