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[50.57.142.19]) by mx.google.com with ESMTPS id u125si18571571qhd.75.2015.04.28.07.34.32 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 28 Apr 2015 07:34:33 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Yn6Zl-0007kt-RU; Tue, 28 Apr 2015 14:33:29 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Yn6Zk-0007kK-KL for xen-devel@lists.xenproject.org; Tue, 28 Apr 2015 14:33:28 +0000 Received: from [85.158.139.211] by server-5.bemta-5.messagelabs.com id EC/FC-02119-73A9F355; Tue, 28 Apr 2015 14:33:27 +0000 X-Env-Sender: julien.grall@citrix.com X-Msg-Ref: server-16.tower-206.messagelabs.com!1430231604!8366589!2 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 6.13.14; banners=-,-,- X-VirusChecked: Checked Received: (qmail 21430 invoked from network); 28 Apr 2015 14:33:26 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-16.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 28 Apr 2015 14:33:26 -0000 X-IronPort-AV: E=Sophos;i="5.11,663,1422921600"; d="scan'208";a="257345542" From: Julien Grall To: Date: Tue, 28 Apr 2015 15:32:25 +0100 Message-ID: <1430231563-25648-2-git-send-email-julien.grall@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1430231563-25648-1-git-send-email-julien.grall@citrix.com> References: <1430231563-25648-1-git-send-email-julien.grall@citrix.com> MIME-Version: 1.0 X-DLP: MIA2 Cc: Wei Liu , ian.campbell@citrix.com, tim@xen.org, Julien Grall , Ian Jackson , stefano.stabellini@citrix.com, Jan Beulich Subject: [Xen-devel] [PATCH v6 01/19] xen/arm: Let the toolstack configure the number of SPIs X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: From: Julien Grall Each domain may have a different number of IRQs depending on the devices assigned to it. Rather than re-using the number of IRQs used by the hardwared GIC, let the toolstack specify the number of SPIs when the domain is created. This will avoid wasting memory. To calculate the number of SPIs, we take advantage of the fact that the libxl interface can only expose 1:1 mapping and look for the largest SPI in the list. Signed-off-by: Julien Grall Acked-by: Ian Campbell Cc: Ian Jackson Cc: Jan Beulich Cc: Wei Liu --- Changes in v6: - Rework the SPIs check in domain_vgic_init to avoid overflow - Fix typoes in commit message - Add Ian's Ack Changes in v5: - Remove stray change - Limit the number of SPIs to (1020 - 32) rather than the number supported by the hardware Changes in v4: - Check the number of SPIs supported by the virtual GIC against the number supported by the hardware GIC. - Use uint32_t rather than int in the toolstack code. - Initialize spi after the check in the toolstack code - Typoes Changes in v3: - Fix typoes - A separate has been created to extend the DOMCTL create domain Changes in v2: - Patch added --- tools/libxc/xc_domain.c | 1 + tools/libxl/libxl_arm.c | 21 +++++++++++++++++++++ xen/arch/arm/domain.c | 2 +- xen/arch/arm/setup.c | 1 + xen/arch/arm/vgic.c | 11 ++++++----- xen/include/asm-arm/vgic.h | 2 +- xen/include/public/arch-arm.h | 2 ++ 7 files changed, 33 insertions(+), 7 deletions(-) diff --git a/tools/libxc/xc_domain.c b/tools/libxc/xc_domain.c index 7cb36d9..d1dec6c 100644 --- a/tools/libxc/xc_domain.c +++ b/tools/libxc/xc_domain.c @@ -67,6 +67,7 @@ int xc_domain_create(xc_interface *xch, /* No arch-specific configuration for now */ #elif defined (__arm__) || defined(__aarch64__) config.gic_version = XEN_DOMCTL_CONFIG_GIC_DEFAULT; + config.nr_spis = 0; #else errno = ENOSYS; return -1; diff --git a/tools/libxl/libxl_arm.c b/tools/libxl/libxl_arm.c index 946618c..5a5cb3f 100644 --- a/tools/libxl/libxl_arm.c +++ b/tools/libxl/libxl_arm.c @@ -39,6 +39,27 @@ int libxl__arch_domain_prepare_config(libxl__gc *gc, libxl_domain_config *d_config, xc_domain_configuration_t *xc_config) { + uint32_t nr_spis = 0; + unsigned int i; + + for (i = 0; i < d_config->b_info.num_irqs; i++) { + uint32_t irq = d_config->b_info.irqs[i]; + uint32_t spi; + + if (irq < 32) + continue; + + spi = irq - 32; + + if (nr_spis <= spi) + nr_spis = spi + 1; + } + + LOG(DEBUG, "Configure the domain"); + + xc_config->nr_spis = nr_spis; + LOG(DEBUG, " - Allocate %u SPIs", nr_spis); + xc_config->gic_version = XEN_DOMCTL_CONFIG_GIC_DEFAULT; return 0; diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index e4d6fc8..180bccc 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -590,7 +590,7 @@ int arch_domain_create(struct domain *d, unsigned int domcr_flags, if ( (rc = gicv_setup(d)) != 0 ) goto fail; - if ( (rc = domain_vgic_init(d)) != 0 ) + if ( (rc = domain_vgic_init(d, config->nr_spis)) != 0 ) goto fail; if ( (rc = domain_vtimer_init(d)) != 0 ) diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 4ec7c13..711562cf 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -830,6 +830,7 @@ void __init start_xen(unsigned long boot_phys_offset, /* Create initial domain 0. */ /* The vGIC for DOM0 is exactly emulating the hardware GIC */ config.gic_version = XEN_DOMCTL_CONFIG_GIC_DEFAULT; + config.nr_spis = gic_number_lines() - 32; dom0 = domain_create(0, 0, 0, &config); if ( IS_ERR(dom0) || (alloc_dom0_vcpu0(dom0) == NULL) ) diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 8f91962..0d30e2c 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -68,16 +68,17 @@ static void vgic_init_pending_irq(struct pending_irq *p, unsigned int virq) p->irq = virq; } -int domain_vgic_init(struct domain *d) +int domain_vgic_init(struct domain *d, unsigned int nr_spis) { int i; d->arch.vgic.ctlr = 0; - if ( is_hardware_domain(d) ) - d->arch.vgic.nr_spis = gic_number_lines() - 32; - else - d->arch.vgic.nr_spis = 0; /* We don't need SPIs for the guest */ + /* Limit the number of virtual SPIs supported to (1020 - 32) = 988 */ + if ( nr_spis > (1020 - NR_LOCAL_IRQS) ) + return -EINVAL; + + d->arch.vgic.nr_spis = nr_spis; switch ( gic_hw_version() ) { diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h index aba0d80..647f2fe 100644 --- a/xen/include/asm-arm/vgic.h +++ b/xen/include/asm-arm/vgic.h @@ -177,7 +177,7 @@ enum gic_sgi_mode; #define vgic_num_irqs(d) ((d)->arch.vgic.nr_spis + 32) -extern int domain_vgic_init(struct domain *d); +extern int domain_vgic_init(struct domain *d, unsigned int nr_spis); extern void domain_vgic_free(struct domain *d); extern int vcpu_vgic_init(struct vcpu *v); extern struct vcpu *vgic_get_target_vcpu(struct vcpu *v, unsigned int irq); diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index ed7e98f..c029e0f 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -315,6 +315,8 @@ typedef uint64_t xen_callback_t; struct xen_arch_domainconfig { /* IN/OUT */ uint8_t gic_version; + /* IN */ + uint32_t nr_spis; }; #endif